EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

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Presentation transcript:

EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs

Topics Buffers Drivers Encoders Multiplexers Exclusive OR Gates Rissacher EE365Lect #8

Three-state buffers Output = LOW, HIGH, or Hi-Z. Can tie multiple outputs together, if at most one at a time is driven. Rissacher EE365Lect #8

Different flavors Rissacher EE365Lect #8

Rissacher EE365Lect #8

Timing considerations Rissacher EE365Lect #8

Three-state drivers Rissacher EE365Lect #8

Driver application Rissacher EE365Lect #8

Three-state transceiver Rissacher EE365Lect #8

Transceiver application Rissacher EE365Lect #8

Encoders vs. Decoders DecoderEncoder Rissacher EE365Lect #8

Binary encoders Rissacher EE365Lect #8

Need priority in most applications Rissacher EE365Lect #8

8-input priority encoder Rissacher EE365Lect #8

Priority-encoder logic equations Rissacher EE365Lect #8

74x148 8-input priority encoder –Active-low I/O –Enable Input –“Got Something” –Enable Output Rissacher EE365Lect #8

74x148 circuit Rissacher EE365Lect #8

74x148 Truth Table Rissacher EE365Lect #8

In Class Practice Problem Write the truth table for a 4-to-2 encoder: No enables Active High inputs and outputs Rissacher EE365Lect #8

In Class Practice Problem Rissacher EE365Lect #8

Cascading priority encoders 32-input priority encoder Rissacher EE365Lect #8

Constant expressions Rissacher EE365Lect #8

Outputs Rissacher EE365Lect #8

Alternative formulation WHEN is very natural for priority function Rissacher EE365Lect #8

Multiplexers Rissacher EE365Lect #8

74x151 8-input multiplexer Rissacher EE365Lect #8

74x151 truth table Rissacher EE365Lect #8

CMOS transmission gates 2-input multiplexer Rissacher EE365Lect #8

Other multiplexer varieties 2-input, 4-bit-wide –74x157 4-input, 2-bit-wide –74x153 Rissacher EE365Lect #8

In Class Practice Problem Write the truth table for a 1-to-4 line Multiplexer: No enables Active High inputs and outputs Rissacher EE365Lect #8

In Class Practice Problem Rissacher EE365Lect #8

Barrel shifter design example n data inputs, n data outputs Control inputs specify number of positions to rotate or shift data inputs Example: n = 16 –DIN[15:0], DOUT[15:0], S[3:0] (shift amount) Many possible solutions, all based on multiplexers Rissacher EE365Lect #8

16 16-to-1 MUXs 16-to-1 mux = 2 x 74x151 8-to-1 mux + NAND gate Rissacher EE365Lect #8

4 16-bit 2-to-1 MUXs 16-bit 2-to-1 mux = 4 x 74x157 4-bit 2-to-1 mux Rissacher EE365Lect #8

Properties of different approaches Rissacher EE365Lect #8

2-input XOR gates Like an OR gate, but excludes the case where both inputs are 1. XNOR: complement of XOR Rissacher EE365Lect #8

XOR and XNOR symbols Rissacher EE365Lect #8

Gate-level XOR circuits No direct realization with just a few transistors. Rissacher EE365Lect #8

CMOS XOR with transmission gates IF B==1 THEN Z = !A; ELSE Z = A; Rissacher EE365Lect #8

Multi-input XOR Sum modulo 2 Parity computation Used to generate and check parity bits in computer systems. –Detects any single-bit error Rissacher EE365Lect #8

Parity tree Faster with balanced tree structure Rissacher EE365Lect #8

Next time Comparators Adders Multipliers Read-only memories (ROMs) Rissacher EE365Lect #8