Combinational Comparators

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Presentation transcript:

Combinational Comparators Comparing two binary inputs A, B each n bits for equality (i.e A = B) is a common operation in computers. A single output combinational circuit to accomplish this can be constructed using n 2-input XNOR gates for bit-wise comparison plus one n-input AND gate. The output = 1 if A = B This can also be done by subtraction (A - B) and checking for a zero result using a single n-input NOR gate. Example: 1-bit comparator: A, B 1-bit each. The 1-bit comparison requires a single XNOR gate Truth table: A B (A Å B)’ 1 Output A B (A  B)’ Output 1-bit comparator

Example: 4-bit Comparator Compares A = A3 A2 A1 A0 with B = B3 B2 B1 B0 Output = 1 if A = B A3 B3 A2 B2 Comparator Output A1 B1 A0 B0

Combinational Shift Circuits An n-bit shift circuit (shifter) has a single n-bit data input A, and a single n-bit output R and a number of control inputs to determine the shift amount (0 to n-1). Possible shift operations include: Shift left or right: Arithmetic right shift (the sign bit is shifted in), logic shift (0 is shifted in) Rotate left or right. Example: Original data input A = 11011 Shift left by one : 10110 Logic shift right by one: 01101 Arithmetic shift right by one: 11101 Rotate left by one: 10111 Combinational shift circuits are usually constructed using a number of levels of multiplexeres.

Example: Combinational 8-Bit Right Shifter Basic Building Block 2-to-1 Mux 1 Mux select S A B D S2 S1 S0 shift amount from 0 to 7 Three levels of Muxes used 1 S2 S1 S0 A0 A1 A2 A3 A4 A5 A6 A7 R0 R1 R2 R3 R4 R5 R6 R7 { Connect to: 0 for logic right shift or to A7 for arithmetic or to A0 - A6 for rotate right Propagation delay: 2 gate delays per level x 3 levels = 6 gate delays How many Mux levels for 32-bit shifter? Propagation delay?