1. Computer Science 210 Computer Organization
Control Circuits (Decoder and Multiplexer)
Arithmetic and Logic Unit (ALU)

2. Control Circuits
Control circuits are special circuits that are used to control other circuit components.
Enable or disable components.
Select one of many components.
Determine which operation is performed.
Two types we’ll study now:
Decoders
Multiplexers

3. Decoder N input lines 2N output lines
Each setting of the input lines “selects” one of the output lines to be 1 with the other output lines being 0.

4. Decoder O0: _ _ I1 I0 O1: _ I1 I0 O2: _ I1 I0 O3: I1 I0 O0 I1 O1 O2 I0

5. Some uses of decoders
The inputs could be bits of a memory address, and the decoder could select the memory cell to activate.
The inputs could be bits in an instruction telling what type of operation is to be performed, and the decoder could activate the appropriate machine components.

6. Multiplexer (Mux) 2N input lines N control lines 1 output line
The control lines “select” which of the input lines is “passed on” to the output.

7. Construction of 4-input Mux 1. Decoder with controls as inputs

8. 2. Add an input to each AND gate

9. 3. Send outputs to an OR gate.C1 C0 I0 I1 I2 I3 O

10. Some uses of multiplexers
Select which of several computers connected to single printer can print.
Decide which of several completed operations should be sent to the output.

11. Arithmetic and Logic Unit (ALU)
Most of the calculations performed in the hardware are done in the ALU
Can do arithmetic (addition or substraction) and logic simultaneously
Select a result based on a machine code (a sequence of bits)

12. ALU Building Blocks
NOT Gate
AND Gate
Multiplexer
OR Gate

13. 1-Bit Logical Unit
Operation
Result
0 1
0 - And Operation Or

14. 1-Bit ALU with Addition O p e r a t i o n C a r r y I n a 1 R e s u l1 R e s u l t 2 b C a r r y O u t

15. 32 bit ALU

16. What about subtraction (a – b) ?
Two's complement approach: just negate b and add one.
How do we negate?

17. 32 bit ALU
binvert
binvert O p e r a t i o n C a r r y I n a 1 R e s u l t b + 2 1 C a r r y O u t
binvert = 1, carryin = 1, operation = 2, gives a + ~b + 1 = a - b

18. Overflow Detection - Operation Operand A Operand B Result +  0 < 0
Note: This can be determined by what happens in the high order bit.

19. Overflow Detection - Operation A’s High Bit B’s High Bit
Result High Bit + 1 -
Note: If we used the output of the binvert MUX, the rows for subtraction would be the same as for addition.

20. Overflow Detection A’s High Bit Binvert MUX Result High Bit Overflow 11
Note: The other rows of a truth table for Overflow would be 0. So, we could build an overflow detector with _ _ _ AMR + AMR

21. High Order 1-Bit ALU (with overflow hardware)n v e r t O p e r a t i o n C a r r y I n a 1 R e s u l t b 2 1
Overflow C a r r y O u t

22. For Monday
Circuits for Memory