EE105 Fall 2007Lecture 14, Slide 1Prof. Liu, UC Berkeley Lecture 14 OUTLINE Frequency Response (cont’d) – CE stage (final comments) – CB stage – Emitter follower – Cascode stage Reading: Chapter ANNOUNCEMENTS Midterm #1 results (undergrad. scores only): N=74; mean=62.8; median=63; std.dev.=8.42 You may pick up your exam during any TA office hour. Regrade requests must be made before you leave with your exam. The list of misunderstood/forgotten points has been updated

EE105 Fall 2007Lecture 14, Slide 2Prof. Liu, UC Berkeley CE Stage Pole Frequencies, for V A <∞ Note that  p,out >  p,in

EE105 Fall 2007Lecture 14, Slide 3Prof. Liu, UC Berkeley I/O Impedances of CE Stage

EE105 Fall 2007Lecture 14, Slide 4Prof. Liu, UC Berkeley Note that there is no capacitance between input & output nodes  No Miller multiplication effect! CB Stage: Pole Frequencies CB stage with BJT capacitances shown

EE105 Fall 2007Lecture 14, Slide 5Prof. Liu, UC Berkeley Emitter Follower Recall that the emitter follower provides high input impedance and low output impedance, and is used as a voltage buffer. Follower stage with BJT capacitances shown C L is the load capacitance Circuit for small-signal analysis (A v )

EE105 Fall 2007Lecture 14, Slide 6Prof. Liu, UC Berkeley AC Analysis of Emitter Follower KCL at node X: KCL at output node:

EE105 Fall 2007Lecture 14, Slide 7Prof. Liu, UC Berkeley Follower: Zero and Pole Frequencies The follower has one zero: The follower has two poles at lower frequencies:

EE105 Fall 2007Lecture 14, Slide 8Prof. Liu, UC Berkeley Emitter Follower: Input Capacitance Recall that the voltage gain of an emitter follower is Follower stage with BJT capacitances shown C XY can be decomposed into C X and C Y at the input and output nodes, respectively:

EE105 Fall 2007Lecture 14, Slide 9Prof. Liu, UC Berkeley Emitter Follower: Output Impedance Circuit for small-signal analysis (R out )

EE105 Fall 2007Lecture 14, Slide 10Prof. Liu, UC Berkeley Emitter Follower as Active Inductor A follower is typically used to lower the driving impedance  R S > 1/g m so that the “active inductor” characteristic on the right is usually observed. CASE 1: R S < 1/g m CASE 2: R S > 1/g m capacitive behaviorinductive behavior

EE105 Fall 2007Lecture 14, Slide 11Prof. Liu, UC Berkeley Cascode Stage Review: – A CE stage has large R in but suffers from the Miller effect. – A CB stage is free from the Miller effect, but has small R in. A cascode stage provides high R in with minimal Miller effect.

EE105 Fall 2007Lecture 14, Slide 12Prof. Liu, UC Berkeley Cascode Stage: Pole Frequencies Cascode stage with BJT capacitances shown (Miller approximation applied) Note that

EE105 Fall 2007Lecture 14, Slide 13Prof. Liu, UC Berkeley Cascode Stage: I/O Impedances

EE105 Fall 2007Lecture 14, Slide 14Prof. Liu, UC Berkeley Summary of Cascode Stage Benefits A cascode stage has high output impedance, which is advantageous for – achieving high voltage gain – use as a current source In a cascode stage, the Miller effect is reduced, for improved performance at high frequencies.

EE105 Fall 2007Lecture 14, Slide 15Prof. Liu, UC Berkeley Impedance of Parallel RC Circuit