Yifat Manzor Reshef Dahan Instructor: Eran Segev Characterization presentation December 2003.

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Presentation transcript:

Yifat Manzor Reshef Dahan Instructor: Eran Segev Characterization presentation December 2003

Hi-Tech Satellite Photography Progress: Resolution & color range Geographic range – 2 km Velocity – 8 km/sec 1 m*m = 4 pixel = 40 bit Data capacity – 1.3 Gbit/sec !!!

Bottleneck Problems Storage Short time transmission window Compressing without losing information Requirement

1.Design and implementation of a fast and efficient video data stream controller that manage several data compressing units 2.Building a simulation to examine the controller in a high rate video data streaming environment

Virtex-II Pro Development Board ADV202 JPEG2000 Video Codec PC Simulation Environment

Block diagram FPGA XC2VP4 adv202’s PPC MEMORY PC Compressing Unit Camera & Storage Simulation

Compressing Unit FPGA XC2VP4 adv 202 Rocket I/O

Camera & Storage PPC Memory Rocket I/O Camera (PC) Ethernet

Compressor Unit Accepts non compressed data from the camera Splits data and sends it to adv202’s Gets the compressed information back from the adv202’s Sends it back as compressed information

Camera & Storage - PPC PPC gets video stream from the camera (PC) Sends it to the compressor unit Gets it back as compressed information Sends a new compressed information to the PCover the Ethernet

Hardware requirements Stab implementation for JPEG2000 Video Codec Flow controller – data split & receiving system Rocket I/O management

Software requirements PowerPC programming – gets data from the Ethernet, passes it to the Rocket I/O, gets it back and sends it to the PC over the Ethernet. PC simulation - provides data over the Ethernet

1.Compressor interface modeling – 1 month 2.FPGA Flow Controller – 1 month 3.Rocket I/O operation – 1 month Estimated completion time – end of March Part I - Winter semester