CMPUT Computer Organization and Architecture I1 CMPUT229 - Fall 2006 Computer Organization and Architecture I Li-Yan Yuan

CMPUT Computer Organization and Architecture I2 Hennessy, John L., Patterson, David A., Computer Organization and Design: The Hardware/Software Interface, Morgan Kaufmann Pub., San Mateo, CA. (H&P) Patt, Yale N., and Patel, Sanjay J., Introduction to Computing Systems: from bits & gates to C & Beyond, McGrawHill Press, (P&P) Goodman, James and Miller, Karen, A Programmer’s View of Computer Architecture with Assembly Language Examples from the MIPS RISC Architecure, Oxford University Press, (G&M) Bryant, Randal E., O’Hallaron, David, Computer Systems: A Programmer’s Perspective, Prentice Hall, (B&H) In Your Course Package Hennessy, John L., Patterson, David A., Computer Organization and Design: The Hardware/Software Interface, Morgan Kaufmann Pub., San Mateo, CA. (H&P) Bryant, Randal E., O’Hallaron, David, Computer Systems: A Programmer’s Perspective, Prentice Hall, (B&H) Patt, Yale N., and Patel, Sanjay J., Introduction to Computing Systems: from bits & gates to C & Beyond, McGrawHill Press, (P&P) Goodman, James and Miller, Karen, A Programmer’s View of Computer Architecture with Assembly Language Examples from the MIPS RISC Architecure, Oxford University Press, (G&M)

CMPUT Computer Organization and Architecture I3 Additional Optional Reading An easy to follow reference to MIPS Assembly: Waldron, J., Introduction to RISC Assembly Language Programming, Addison-Wesley, ISBN An excellent reference book for the C Language: Harbison, Samuel P., and Steele Jr., Guy, C: A Reference Manual, Prentice Hall, 4th Edition, A more recent and complete book on MIPS Assembbly: Britton, Robert L., MIPS Assembly Language Programming, Prentice Hall, Upper Saddle River, NJ, 2004.

CMPUT Computer Organization and Architecture I4 Contents zComputer organization and instruction sets zAssembly language (MIPS and SPIM) zNumber systems and binary arithmetics zDigital Logic and logic gates zExceptions and interrupts zInput and output programming zMemory hierarchy

CMPUT Computer Organization and Architecture I5 Instructor:Prof. Li-Yan Yuan Office:Athabasca 3-56 Phone: Office Hours:MWF14:00-14: Admin. Information

CMPUT Computer Organization and Architecture I6 Important Dates September 18(Monday): lab classes start this week October 27 (Friday ） : mid-term exam December 6 (Wednesday): last day of classes December 15 (Wednesday): final exam (tentative) Assignments and Labs to be posted later

CMPUT Computer Organization and Architecture I7 Grade Distribution Course work will carry the following weights towards your final grade: Five (5) Lab. Assignments: 25% Five (5) Assignments: 10% Midterm Exam: 25% Final Exam: 40%

CMPUT Computer Organization and Architecture I8 Late Submission Policy For Labs: zThere is no late submission for labs! zAll deadlines are “drop-dead deadlines”! zDeferred exams will be scheduled before Feb. 2, 2007, and will be different from the final given on the scheduled date.

CMPUT Computer Organization and Architecture I9 NO Late Submissions!!!! Did I mention? None. At all.

CMPUT Computer Organization and Architecture I10 Computer Organization Memory (See CullerSinghGupta, pp. 32) Input/Output CPU Bus

CMPUT Computer Organization and Architecture I11 Computer Organization P-Pro bus (64-bit data, 36 bit address, 66 MHz) CPU Interrupt Controler 256-KB L2 Bus interface PCI Bridge PCI I/O Cards PCI I/O Cards PCI I/O Cards PCI Bus PCI Bridge PCI I/O Cards PCI I/O Cards PCI I/O Cards PCI Bus Memory Controller Memory Interleave Unit 1-, 2-, 4-way Interleaved DRAM (See CullerSinghGupta, pp. 32)

CMPUT Computer Organization and Architecture I12 Example of SMP machine: Pentium “quad pack” P-Pro bus (64-bit data, 36 bit address, 66 MHz) CPU Interrupt Controler 256-KB L2 Bus interface CPU Interrupt Controler 256-KB L2 Bus interface CPU Interrupt Controler 256-KB L2 Bus interface CPU Interrupt Controler 256-KB L2 Bus interface PCI Bridge PCI I/O Cards PCI I/O Cards PCI I/O Cards PCI Bus PCI Bridge PCI I/O Cards PCI I/O Cards PCI I/O Cards PCI Bus Memory Controller Memory Interleave Unit 1-, 2-, 4-way Interleaved DRAM (See CullerSinghGupta, pp. 32)

CMPUT Computer Organization and Architecture I13 How to ask your computer to perform a task? zAsk your friend or little sister/brother do it for you zUse a graphic tool such as a web browser zWrite a high level program such as C, Java zWrite an assembly language program zWrite a sequence of ONEs and ZEROs

CMPUT Computer Organization and Architecture I14 What can be recognized by a computer ? z English article or Chinese article ? z Windows, Macintosh, or Linux ? z C or Java z A sequence of 1s and 0s

CMPUT Computer Organization and Architecture I15 Converting Source into Executable Files Henn-Pat, pp. A-4 COPYRIGHT 1998 MORGAN KAUFMANN PUBLISHERS, INC. ALL RIGHTS RESERVED

CMPUT Computer Organization and Architecture I16 A More Complete Story Source file Compiler Assembler file Object file Assembler Linker Source file Compiler Assembler file Object file Assembler Source file Compiler Assembler file Object file Assembler Program library Program library Executable file

CMPUT Computer Organization and Architecture I17 Converting Source into Executable Files Henn-Pat, pp. A-8 COPYRIGHT 1998 MORGAN KAUFMANN PUBLISHERS, INC. ALL RIGHTS RESERVED

CMPUT Computer Organization and Architecture I18 The Linker Henn-Pat, pp. A-18 COPYRIGHT 1998 MORGAN KAUFMANN PUBLISHERS, INC. ALL RIGHTS RESERVED

CMPUT Computer Organization and Architecture I19 When to use Assembly Language? yWhen you don’t have the tools to program in higher level: xnew embedded processors xcompilers that check deadlines for real time system do not exist yet yWhen the tools fail: xCompilers still generate sub-optimal code yWhen you are building the tools: xCompiler designer/builders must know assembly well

CMPUT Computer Organization and Architecture I20 Anatomy of an Object File Size and position of other pieces. Machine Code Binary Data Representation. References that must change if the program is moved in memory. Associate addresses with external label. Unresolved references. Compilation information to allow mapping of addresses to source code. Henn-Pat, pp. A-13 COPYRIGHT 1998 MORGAN KAUFMANN PUBLISHERS, INC. ALL RIGHTS RESERVED

CMPUT Computer Organization and Architecture I21 How to distinguish one computer from others z PC, Mac, Server, mainframe z Windows, Macintosh, Unix, Linux z AMD, Intel, Sun, IBM z Virtual machines for Java, Prolog, etc

CMPUT Computer Organization and Architecture I22 Instruction Set z An instruction set (or instruction set architecture ISA) includes a set of machine codes (instructions) of a particular CPU design z

CMPUT Computer Organization and Architecture I23 Instruction Set z ISA is part of the computer architecture yDatatypes yInstructions y registers yAddressing mode yMemory architecture yInterrupt and exception yIntput and output

CMPUT Computer Organization and Architecture I24 Instruction Set zPDP-11 zMotorola zMIPS zIBM 700/7000 zSPARC zX86 (Pentium, AMD64) zJava virtual machines

CMPUT Computer Organization and Architecture I25 Type of instruction sets zCISC ( Complex Instruction Set Computer) ySupport many complicated instructions  complete a task in as few lines of instruction as possible zRISC (Reduced Instruction Set Computer)  use simple instructions that can be executed within one clock cycle. yPay penalty in the unusual cases but speed up for most simple instructions

CMPUT Computer Organization and Architecture I26 Example: Multiplying two numbers in memory M[2,3] = M[2, 4] X M[5,2]

CMPUT Computer Organization and Architecture I27 M[2,3] = M[2, 4] X M[5,2] zCISC Approach y MULT 2:3, 5:2 zRISC Approach y LOAD A, 2:3 y LOAD B, 5:2 y PROD A, B y STORE 2:3 A

CMPUT Computer Organization and Architecture I28 CISC zEmphasis on hardware zsupport multi-clock complex instructions zMemory-to-memory LOAD and STORE incorporated in instructions zSmall code sizes zHigh cycles per second transistors used for storing complex instructions

CMPUT Computer Organization and Architecture I29 RISC zEmphasis on software zSingle-clock reduced instruction only zRegister to register LOAD and STORE are independent instructions zLow cycles per second zLarge code sizes zSpends more transistors on memory registers

CMPUT Computer Organization and Architecture I30 The Performance z Time time cycles instructions Program cycle instruction program = X X

CMPUT Computer Organization and Architecture I31 Instruction Set zPDP-11 zMotorola zMIPS zMacBook zSPARC zX86 (Pentium, AMD64) CISC RISC

CMPUT Computer Organization and Architecture I32 MIPS zMicroprocessor without Interlocking Pipeline zDesigned by John Henessy zSGI graphics workstations and servers

CMPUT Computer Organization and Architecture I33 Basic Architecture of MIPS z 32 registers z memory organization y each byte with its own address y 32 bit z I/O Organization

CMPUT Computer Organization and Architecture I34 SPIM Simulator zSPIM is a simulator that runs programs for the MIPS R2000/R3000 RISC computers z Advantages using SPIM ySelf contains, system independent, y stable software, ySupports X-windows, with a debugger