CMPUT 329 - Computer Organization and Architecture II1 CMPUT329 - Fall 2003 TopicJ: Counters José Nelson Amaral.

Slides:



Advertisements
Similar presentations
28/10/2007DSD,USIT,GGSIPU1 Latch & Register Inference.
Advertisements

Sequential Circuits A Basic sequential circuit is nothing but a combinational circuit with some feedback paths between its output and input terminals.
Half Adder Sum = X’Y+XY’ = X  Y Carry = XY YXYXYX  YYYX  XX XOR XNOR.
1 EE121 John Wakerly Lecture #10 Some shift-register stuff Sequential-circuit analysis.
Digital Digital: Chapter 8. Sequential Logic Design Practices 1 Chapter 8. Sequential Logic Design Practices.
CMPUT Computer Organization and Architecture II1 CMPUT329 - Fall 2003 TopicJ: Counters José Nelson Amaral.
Simple Sequential Circuits in VHDL. Contents Sequential circuit examples: - SR latch in dataflow style - D flip-flop in behavioral style - shift register.
EE42/100 Fall 2005 Prof. Fearing 1 Week 12/ Lecture 22 Nov. 17, Overview of Digital Systems 2.CMOS Inverter 3.CMOS Gates 4.Digital Logic 5.Combinational.
Registers & Counters Registers. Shift Registers: Counters:
Parallel–to-serial conversion(P712) 8.5 Shift Registers NextReturn serial input Shift-Register Structure serial output parallel input parallel output.
Sequential PLD timing Registers Counters Shift registers
Digital Logic Design Lecture 24. Announcements Homework 8 due today Exam 3 on Tuesday, 11/25. – Topics for exam are up on the course webpage.
CMPUT Computer Organization and Architecture II1 CMPUT329 - Fall 2003 Topic: Internal Organization of an FPGA José Nelson Amaral.
ECE C03 Lecture 91 Lecture 9 Registers, Counters and Shifters Hai Zhou ECE 303 Advanced Digital Design Spring 2002.
Sistemas Digitais I LESI - 2º ano Lesson 8 - Sequential Design Practices U NIVERSIDADE DO M INHO E SCOLA DE E NGENHARIA Prof. João Miguel Fernandes
1 EE365 More on sequential circuits. 2 Serial data systems (e.g., TPC)
ENGIN112 L26: Shift Registers November 3, 2003 ENGIN 112 Intro to Electrical and Computer Engineering Lecture 26 Shift Registers.
REGISTER A Register is a group of binary storage cells suitable for holding binary information. A group of flip-flops constitutes a register, since each.
1 Digital Design: Sequential Logic Blocks Credits : Slides adapted from: J.F. Wakerly, Digital Design, 4/e, Prentice Hall, 2006 C.H. Roth, Fundamentals.
Unit 12 Registers and Counters Ku-Yaw Chang Assistant Professor, Department of Computer Science and Information Engineering Da-Yeh.
Lecture 21 Overview Counters Sequential logic design.
Unit 12 Registers and Counters Ku-Yaw Chang Assistant Professor, Department of Computer Science and Information Engineering Da-Yeh.
EKT 124 / 3 DIGITAL ELEKTRONIC 1
Flip-Flop Applications Registers.  a register is a collection of flip-flops  basic function is to hold information  a shift register is a register.
Registers and Counters
ECE 301 – Digital Electronics Flip-Flops and Registers (Lecture #15)
Counters Clocked sequential circuit whose state diagram contains a single cycle. Modulus – number of states in the cycle. Counters with non-power of 2.
1 Shift Registers. –Definitions –I/O Types: serial, parallel, combinations –Direction: left, right, bidirectional –Applications –VHDL implementations.
Registers and Counters
EE24C Digital Electronics Projects
CHAPTER 12 REGISTERS AND COUNTERS
Registers CPE 49 RMUTI KOTAT.
1 Registers and Counters A register consists of a group of flip-flops and gates that affect their transition. An n-bit register consists of n-bit flip-flops.
Digital Logic Design Sequential circuits
Digital Design: Principles and Practices
Algorithmic State Machines.  1) Create an algorithm, using pseudocode, to describe the desired operation of the device. 2) Convert the pseudocode into.
CE1110: Digital Logic Design Sequential Circuits.
Princess Sumaya Univ. Computer Engineering Dept. Chapter 6:
EE365 Adv. Digital Circuit Design Clarkson University Lecture #12 Registers and Counters.
1 Lecture #17 EGR 277 – Digital Logic Reading Assignment: Chapter 6 in Digital Design, 3 rd Edition by Mano Timing Sequences So far we have designed circuits.
1 Register A register is a sequential circuit that can be set to a specific state and retain that state until externally changed. –State is a combination.
Shift Registers pp Shift Registers Capability to shift bits ♦ In one or both directions Why? ♦ Part of standard CPU instruction set ♦ Cheap.
Computer Organization & Programming Chapter 5 Synchronous Components.
Registers Page 1. Page 2 What is a Register?  A Register is a collection of flip-flops with some common function or characteristic  Control signals.
Abdullah Said Alkalbani University of Buraimi
Sequential Logic Circuit
Sequential Logic Circuit
Sequential logic circuits
EKT 124 / 3 DIGITAL ELEKTRONIC 1
Digital Electronics Electronics Technology Landon Johnson Shift Registers.
EE121 John Wakerly Lecture #9
© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Logic Design Dr. Oliver Faust.
Lecture Overview Shift Register Buffering Direct Memory Access.
© BYU 12 REGISTERS Page 1 ECEn 224 Registers.
Registers ECEn/CS 224.
ECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGN Dr. Shi Dept. of Electrical and Computer Engineering.
Interrupt, again! Lin Zhong ELEC424, Fall 2010.
Modular sequential logic Use latches, flip-flops and combinational logic –Flip-flops usually grouped to form a register Shift registers –n bits {x n …x.
Counters and registers Eng.Maha Alqubali. Registers Registers are groups of flip-flops, where each flip- flop is capable of storing one bit of information.
1 CHAPTER 12 REGISTERS AND COUNTERS This chapter in the book includes: Objectives Study Guide 12.1Registers and Register Transfers 12.2Shift Registers.
CSE 260 Digital Logic Design Registers, Memory BRAC University.
REGISTERS - Introduction to Registers Shift Registers Lecture 1 Gunjeet Kaur Dronacharya Group of Institutions.
Digital Design: Sequential Logic Blocks
INTRODUCTION Overview of Shift Registers
3.2 Shift Register Basic shift register function
CSE 370 – Winter Sequential Logic-2 - 1
Lecture 17 Logistics Last lecture Today HW5 due on Wednesday
CSC 220: Computer Organization
CHAPTER 4 SHIFT REGISTER
Lecture 17 Logistics Last lecture Today HW5 due on Wednesday
Presentation transcript:

CMPUT Computer Organization and Architecture II1 CMPUT329 - Fall 2003 TopicJ: Counters José Nelson Amaral

CMPUT Computer Organization and Architecture II2 Reading Material Section 8.5 of Wakerly.

CMPUT Computer Organization and Architecture II3 Shift Registers A shift register is an n-bit register that can shift its stored data by one bit position at each clock tick A serial input (SERIN) specifies a new bit to be shifted in. A serial output (SEROUT) has the value of the bit that is shifted out. In a serial-in serial-out register only one bit is out at any clock cycle. In a serial-in parallel-out register all stored bits are out at every clock cycle.

CMPUT Computer Organization and Architecture II4 Shift Registers serial-in, serial-out serial-in, parallel-out

CMPUT Computer Organization and Architecture II5 Shift Register parallel-in, serial-out

CMPUT Computer Organization and Architecture II6 MSI Shift Registers Bidirectional

CMPUT Computer Organization and Architecture II7 Shift Register parallel-in, parallel-out

CMPUT Computer Organization and Architecture II8 Quiz Design a function table for a 4-bit shift register that at any clock cycle can perform one of the four functions: Hold: keep the same value that it had in the previous cycle Shift right: shift the values to the right, and shift in the value of an RIN input Shift left: shift the values to the left, and shift in the value of an LIN input Load: Load the values of inputs A, B, C, D, into flip-flops QA, QB, QC, QD. If you were to specify this shift register as a finite state machine, how many states your machine would have?

CMPUT Computer Organization and Architecture II9 74x194: 4-bit Universal Shift Register

CMPUT Computer Organization and Architecture II10 FSM for the 74x SL & LIN=1+ Load & ABCD=0001SR & RIN=1+ Load & ABCD=1000 Hold + Load & ABCD=0000

CMPUT Computer Organization and Architecture II11 74x194: 4-bit Universal Shift Register

CMPUT Computer Organization and Architecture II12 74x194: 4-bit Universal Shift Register

CMPUT Computer Organization and Architecture II13 74x299: 8-bit Universal Shift Register The 74x299 is an 8-bit version of the 74x194. It implements bidirectional three-state lines for input and output to save pins.

CMPUT Computer Organization and Architecture II14 74x299: 8-bit Universal Shift Register

CMPUT Computer Organization and Architecture II15 Serial/Parallel Conversions SYNC is a reference signal that indicates the beginning of a byte or word.

CMPUT Computer Organization and Architecture II16 Parallel-to-serial conversion frame

CMPUT Computer Organization and Architecture II17

CMPUT Computer Organization and Architecture II18