Chapter 5 8051 Addressing Modes

Sections 5.1 Immediate and register addressing modes 5.2 Accessing memory using various address modes

Objective 程式中的資料可能是放在 Register 中，或在RAM 中某一位址上，或在 ROM 一塊特殊區域放置資料，或者是指令中直接給予定值。 設計 8051 IC 的人們，提供這些存取資料的方式。這些方式便叫作 Addressing Mode。 中文稱為“定址模式”：決定參數位址的模式 也許不同家的 Assembler 會有不同的指令寫法，但基本上 addressing mode 都是一樣的。

Section 5.1 Immediate and Register Addressing Modes

What is Addressing Mode The CPU can access data in various ways. The data could be in a register, or in memory（RAM or ROM）, or be provided as an immediate value. These various ways of accessing data are called addressing mode.

Addressing Mode in the 8051 Five addressing mode in the 8051： 1. immediate 2. register 3. direct 4. register indirect 5. indexed 先不管這些名詞的意義, 先猜猜看有哪些方法可以存取記憶體 ROM 和 RAM.

Addressing Mode 1 1. immediate － the operand is a constant MOV A,#01FH 2. register － the operand is in a register MOV A,R0 3. direct － access the data in the RAM with address MOV A,01FH 4. register indirect － the register holds the RAM address of the data MOV A,@R0 5. indexed － for on-chip ROM access MOVC A,@A+DPTR

Immediate Addressing Mode The source operand is a constant. When the instruction is assembled, the operand comes immediately after the opcode. The immediate vale can be loaded into any of the registers. The immediate data must be preceded by the pound sign, ‘＃’. The immediate value is bounded by the size of register. Please use the simulation tools to find the the machine code and the content of registers after execution. See Tables 10 ＆11 (page 418).

Example of Immediate Mode（1/2） 1 0000 74 25 MOV A,#25H ;A=25H 2 0002 7C 3E MOV R4,#62 ;A=62=3EH 3 0004 90 45 21 MOV DPTR,#4521H Instruction Opcodes in Table 11 Hex code Mnemonic Operands Byte 74 MOV A, #data 2 7C MOV R4, #data 2 90 MOV DPTR, #data 3 DPTR has high byte DPH (address 83) and low byte DPL (address 82) However, 8051 CPU does not provide a special machine instructions for MOV DPH, #data or MOV DPL,#data, Although 8051 Assembler provide the assembly instructions for DPH and DPL

Example of Immediate Mode（2/2） 1 0000 74 25 MOV A,#25H ;A=25H 2 0002 7C 3E MOV R4,#62 ;A=62=3EH 3 0004 90 45 21 MOV DPTR,#4521H Instruction Opcodes in Table 10 Mnemonic Oscillator Period MOV A, #data 12 MOV Rn, #data 12 MOV DPTR, #data 24 Rn - Register R7-R0 of the currently selected Register Bank. in ‘Table 10 page 418

EQU The EQU directive is used in the immediate addressing mode. 1 0000 ORG 0H 2 0000 COUNT EQU 30 3 0000 7C 1E MOV R4,#COUNT 4 0002 90 02 00 MOV DPTR,#MYDATA 5 0200 ORG 200H 6 0200 41 6D 65 72 69 MYDATA DB "America" 7 0207 END Assembler will transfer the COUNT=30=1EH to the immediate value. MYDATA is the address of “America”, point to “A” Assembler will transfer the MYDATA to the address 200H. 1 0000 ORG 0H 2 0000 COUNT EQU 30 3 0000 7C 1E MOV R4,#COUNT ;R4=30 4 0002 90 02 00 MOV DPTR,#MYDATA ;DPTR=200H 5 0200 ORG 200H 6 0200 41 6D 65 72 69 MYDATA DB "America" 7 0207 END

Addressing Mode 2 1. immediate － the operand is a constant MOV A,#01FH 2. register － the operand is in a register MOV A,R0 3. direct － access the data in the RAM with address MOV A,01FH 4. register indirect － the register holds the RAM address of the data MOV A,@R0 5. indexed － for on-chip ROM access MOVC A,@A+DPTR

Register Addressing Mode Register addressing mode involves the use of registers to hold the data. The source and destination registers must match in size. The movement of data between Rn registers is not allowed. “MOV R4,R7” is illegal. You can find that the opcode in register addressing mode is short！

Example of Register Mode（1/2） 1 0000 E8 MOV A,R0 2 0001 FA MOV R2,A 3 0002 2D ADD A,R5 Instruction Opcodes in Table 11 Hex code Mnemonic Operands Byte E8 MOV A,R0 1 FA MOV R2,A 1 2D ADD A,R5 1

Example of Register Mode（2/2） 1 0000 E8 MOV A,R0 2 0001 FA MOV R2,A 3 0002 2D ADD A,R5 Instruction Opcodes in Table 10 Mnemonic Oscillator Period MOV A, Rn 12 MOV Rn, A 12 ADD A, Rn 12

Section 5.2 Accessing Memory Using Various Address Modes

Addressing Mode 3 1. immediate － the operand is a constant MOV A,#01FH 2. register － the operand is in a register MOV A,R0 3. direct － access the data in the RAM with address MOV A,01FH 4. register indirect － the register holds the RAM address of the data MOV A,@R0 5. indexed － for on-chip ROM access MOVC A,@A+DPTR

Direct Addressing Mode There are 128 bytes of RAM in the 8051. The RAM has been assigned address 00 - 7FH. 00-1FH：the register banks and stack 20-2FH：bit-addressable space to save single-bit data 30-7FH：scratch pad RAM In direct addressing mode, the data is in a RAM memory location whose address is known, and this address is given as a part of the instruction. If an number begins without a pound sign, ‘＃’, then Assembler think it as the RAM address. It is most often used to access RAM location 20-7FH. This is due to the fact that register bank locations are accessed by the register names of R0-R7 -- register mode. There is no such name for other RAM locations. -- so use direct address mode.

Example of Direct Mode（1/2） 1 0000 A8 40 MOV R0,40H 2 0002 F5 56 MOV 56H,A 3 0004 90 45 21 MOV DPTR,#4521 4 0007 75 83 45 MOV DPH,#45H 5 000A 75 82 21 MOV DPL,#21H Instruction Opcodes Table 11 Hex code Mnemonic Operands Bytes A8 MOV R0, data addr. 2 F5 MOV data addr., A 2 75 MOV data addr., #data 3 “Direct” means “data address”. DPTR has high byte DPH (address 83) and low byte DPL (address 82)

Example of Direct Mode（2/2） 1 0000 A8 40 MOV R0,40H 2 0002 F5 56 MOV 56H,A 3 0004 90 45 21 MOV DPTR,#4521 4 0007 75 83 45 MOV DPH,#45H 5 000A 75 82 21 MOV DPL,#21H Instruction Opcodes Table 10 Mnemonic Oscillator Period MOV Rn, direct 24 MOV direct, A 12 MOV direct, #data 24 “Direct” means “data address”. DPTR has high byte DPH (address 83) and low byte DPL (address 82)

Register Bank（1/2） If we use register bank 0, then the following instructions 2＆3 do the same works： 1 0000 7C 64 MOV R4,#100 2 0002 E5 04 MOV A,4 ;direct mode 3 0004 EC MOV A,R4 ;register mode Initially, the 8051 uses the register bank 0. R4 has RAM address 04H.

Register Bank（2/2） If we use register bank 1, then the following instructions 3＆4 do the different works： 1 0000 D2 D3 SETB RS0 ;RS0=1 2 0002 7C 64 MOV R4,#100 3 0004 E5 04 MOV A,4 ;A=0 4 0006 EC MOV A,R4 ;A=100=64H RS1=PSW.4=0 ＆ RS0=PSW.3=1  register bank 0 Initially, the content of RAM is 00H. R4 has RAM address 0CH. RAM 0CH has the value 100.

SFR（Special Function Register） There are many special functions registers in the 8051. We call them SFR. Example：A, B, PSW, and DPTR The 8051 Assembler provides that the SFR can be accessed by their name or by their addresses. See Table 5-1 for SFR addresses The SFR have addresses between 80H and FFH. Not all the address space of 80 to FF is used by the SFR. The addresses 00-0FH are addresses of RAM memory inside the 8051. So SFR needs to use the addresses 80H to FFH. The addresses 80H to FFH is not a really RAM. The unused locations 80H to FFH are reserved and must not be used by the 8051 programmer. We can access SFR by direct addressing mode.

Table 5-1: Special Function Register (SFR) Addresses（1/2） Symbol Name Address ACC* Accumulator 0E0H B* B register 0F0H PSW* Program status word 0D0H SP Stack pointer 81H DOTR Data pointer 2 bytes DPL Low byte 82H DPH High byte 83H P0* Port 0 80H P1* Port 1 90H P2* Port 2 0A0H P3* Port 3 0B0H IP* Interrupt priority control 0B8H IE* Interrupt enable control 0A8H TMOD Timer/counter mode control 89H

Table 5-1: Special Function Register (SFR) Addresses （2/2） Symbol Name Address TCON* Timer/counter control 88H T2CON* Timer/counter 2 control 0C8H T2MOD Timer/counter mode control 0C9H TH0 Timer/counter 0 high byte 8CH TL0 Timer/counter 0 low byte 8AH TH1 Timer/counter 1 high byte 8DH TL1 Timer/counter 1 low byte 8BH TH2 Timer/counter 2 high byte 0CDH TL2 Timer/counter 2 low byte 0CCH RCAP2H T/C 2 capture register high byte 0CBH RCAP2L T/C 2 capture register low byte 0CAH SCON* Serial control 98H SBUF Serial data buffer 99H PCON Power control 87H *bit addressable (discussed further in Chapter 8)

ACC and Its Address ACC has SFR address 0E0H. 1 0000 75 E0 55 MOV 0E0H,#55H 2 0003 74 55 MOV A,#55H 3 0005 D2 E1 SETB A.1 Compare their code size and execution time. “ACC＊”, ＊ means this register is bit addressable. You can access each bit of ACC independently. 1 0000 75 E0 55 MOV 0E0H,#55H : 2 bytes 2 MCs 2 0003 74 55 MOV A,#55H : 2 bytes 1 MC For address 0E0H, if the instruction is for a bit “SETB”, then it refers to A.0 if the instruction is for a byte “MOV”, then it refers to A. SFC addr. 0E7 0E6 0E5 0E4 0E3 0E2 0E1 0E0 ACC A.7 A.6 A.5 A.4 A.3 A.2 A.1 A.0

Example 5-1 Write code to send 55H to ports P1 and P2, using (a) their names (b) their addresses. Solution: (a) MOV A,#55H ;A=55H MOV P1,A ;P1=55H MOV P2,A ;P2=55H (b) From Table 5-1, P1 address = 80H; P2 address = A0H MOV A,#55H ;A=55H MOV 80H,A ;P1=55H MOV 0A0H,A ;P2=55H

Stack Another major use of direct addressing mode is the stack. In the 8051 family, only direct addressing mode is allowed for pushing onto the stack.

Example 5-2（1/2） Show the code to push R5, R6, and A onto the stack and then pop them back them into R2, R3, and B. We want：B = A, R2 = R6, and R3 = R5. Solution: PUSH 05 ;push R5 onto stack PUSH 06 ;push R6 onto stack PUSH 0E0H ;push register A onto stack POP 0F0H ;pop top of stack into register B POP 02 ;pop top of stack into R2 POP 03 ;pop top of stack into R3 1 0000 C0 05 PUSH R5 2 0002 C0 06 PUSH R6 3 0004 C0 E0 PUSH A 1 0000 C0 05 PUSH 05 2 0002 C0 06 PUSH 06 3 0004 C0 E0 PUSH 0E0H

Example 5-2（1/2） Different assembler provide different instruction for the stack. In our simulation tools, they are the same： 1 0000 C0 05 PUSH R5 2 0002 C0 06 PUSH R6 3 0004 C0 E0 PUSH A 1 0000 C0 05 PUSH 05 2 0002 C0 06 PUSH 06 3 0004 C0 E0 PUSH 0E0H

Addressing Mode 4 1. immediate － the operand is a constant MOV A,#01FH 2. register － the operand is in a register MOV A,R0 3. direct － access the data in the RAM with address MOV A,01FH 4. register indirect － the register holds the RAM address of the data MOV A,@R0 5. indexed － for on-chip ROM access MOVC A,@A+DPTR

Register Indirect Addressing Mode In the register indirect addressing mode, a register is used as a pointer to the data. That is, this register holds the RAM address of the data. Only registers R0 and R1 can be used to hold the address of an operand located in RA. Usually, R0 and R1 are denoted by Ri. When R0 and R1 hold the addresses of RAM locations, they must be preceded by the “@” sign. So it is called “indirect”. If you forget the @ sign, 8051 Assembler will use the content of Ri.

Example of Register Indirect Mode（1/2） 1 0000 75 20 64 MOV 20H,#100 2 0003 78 20 MOV R0,#20H 3 0005 E6 MOV A,@R0 DPTR has high byte DPH (address 83) and low byte DPL (address 82) However, 8051 CPU does not provide a special machine instructions for MOV DPH, #data or MOV DPL,#data, Although 8051 Assembler provide the assembly instructions for DPH and DPL RAM 1. put 64H to addr. 20H 2. let R0 be the data address 1E 00 1F 00 20 64 21 00 22 00 23 : R0 20H 3. copy the content in addr. R0=20H to A A 64H

Example of Register Indirect Mode（2/2） 1 0000 75 F0 80 MOV B,#080H 2 0003 79 31 MOV R1,#31H 3 0005 A7 F0 MOV @R1,B DPTR has high byte DPH (address 83) and low byte DPL (address 82) However, 8051 CPU does not provide a special machine instructions for MOV DPH, #data or MOV DPL,#data, Although 8051 Assembler provide the assembly instructions for DPH and DPL RAM 3. copy B to the RAM location with addr. R1=31H 2F 00 30 00 31 80 32 00 33 00 34 : 2. let R0 be the data address R1 31H 1. let B=80H B 80H

Example 5-3 (1/3) Write a program to copy the value 55H into RAM memory locations 40H to 45H using (a) direct addressing mode, (b) register indirect addressing mode without a loop, (c) with a loop. Solution of (a) : MOV A,#55H MOV 40H,A MOV 41H,A MOV 42H,A MOV 43H,A MOV 44H,A RAM 40 55 41 55 42 55 43 55 44 00 45 50 copy A to the RAM location of addr. 43H A 55H

Example 5-3 (2/3) Solution of (b) register indirect addressing mode without a loop MOV A,#55H ;load A with value 55H MOV R0,#40H ;load the pointer. R0=40H MOV @R0,A ;copy A to RAM location where R0 ; points to INC R0 ;increment pointer. Now R0=41H MOV @R0,A INC R0 ;R0=42H INC R0 ;R0=43H INC R0 RAM 40 55 41 55 42 55 43 00 44 00 45 00 R0 43H A 55H

Example 5-3 (3/3) Solution of (c) with a loop: MOV A,#55H ;A=55H MOV R0,#40H ;load pointer. R0=40H, MOV R2,#05H ;load counter, R2=5 AGAIN: MOV @R0,A ;copy 55 to RAM location ; R0 points to INC R0 ;increment R0 pointer DJNZ R2,AGAIN ;loop until counter = 0

Advantage of Register Indirect Addressing Mode One of the advantages of register indirect addressing mode is that it makes accessing data dynamic rather than static. Solution (c) in Example 5-3 is the most efficient and is possible only because of register indirect addressing mode. Looping is not possible in direct addressing mode. See Examples 5-4, 5-5, too. Their use is limited to accessing any information in the internal RAM. Use looping is more flexible too. If we need to access externally connected RAM or on-chip ROM, we need a 16-bit pointer. In such cases, the DPTR register is used. That is, indexed addressing mode.

Example 5-4 Write a program to clear 16 RAM locations starting at RAM address 60H. Solution: CLR A ;A=0 MOV R1,#60H ;load pointer. R1=60H MOV R7,#16 ;load counter, R7=10H AGAIN: MOV @R1,A ;clear RAM location R1 ; points to INC R1 ;increment R1 pointer DJNZ R7,AGAIN ;loop until counter = 0

Example 5-5 Write a program to copy a block of 10 bytes of data from RAM locations starting at 35H to RAM locations starting at 60H. Solution: MOV R0,#35H ;source pointer MOV R1,#60H ;destination pointer MOV R3,#10 ;counter BACK: MOV A,@R0 ;get a byte from source MOV @R1,A ;copy it to destination INC R0 ;increment source pointer INC R1 ;increment destination ; pointer DJNZ R3,BACK ;keep doing it 10 times

Addressing Mode 5 1. immediate － the operand is a constant MOV A,#01FH 2. register － the operand is in a register MOV A,R0 3. direct － access the data in the RAM with address MOV A,01FH 4. register indirect － the register holds the RAM address of the data MOV A,@R0 5. indexed － for on-chip ROM access MOVC A,@A+DPTR

Indexed Addressing Mode Indexed addressing mode is widely used in accessing data elements of look-up table entries located in the program ROM space of the 8051. A look-up table is a ROM block where the data is given previously (then you can access it frequently). The instruction used for this purpose is MOVC. DPTR can be used to access memory externally connected to the 8051. See Chapter 14. Another register used in indexed addressing mode is the PC. See Appendix A.

MOVC Copy the source operand to the destination operand. MOVC A, @A+DPTR The “C” means code (program code in on-chip ROM). A+DPTR is the address of the data element stored in on-chop ROM. Put the ROM value to A.

Example of MOVC Register Indexed addressing Mode： 1 0000 90 00 06 MOV DPTR,#MYDATA 2 0003 E4 CLR A 3 0004 93 MOVC A,@A+DPTR 4 0005 F8 MOV R0,A 5 0006 80 FE HERE: SJMP HERE 5 0008 55 53 41 MYDATA: DB "USA“ DPTR=#MYDATA=0008H A+DPTR=0008H ROM 00 90 01 00 02 06 03 E4 : 08 55 09 53 0A 41 A 55H

Example 5-6 (1/2) In this program, assume that the word “USA” is burned into ROM locations starting at 200H, and that the program is burned into ROM locations starting at 0. Analyze how the program works and state where “USA” is stored after this program is run. Solution: ROM 0000 90 0001 02 0002 00 0003 E4 : 0200 55 0201 53 0202 41 DPTR 02H 00H A+DPTR= 0200H U S A R0 55H A 55H R1 00H R2 00H

Example 5-6 (2/2) ORG 0000H ;burn into ROM from 0 MOV DPTR,#200H ;DPTR=200H CLR A ;clear A(A=0) MOVC A,@A+DPTR ;get the char space MOV R0,A ;save it in R0 INC DPTR ;DPTR=201 MOVC A,@A+DPTR ;get the next char MOV R1,A ;save it in R1 INC DPTR ;DPTR=202 MOV R2,A ;save it in R2 HERE:SJMP HERE ;stay here ORG 200H MYDATA: DB “USA” END ;end of program

Example 5-7 (1/2) Assuming that ROM space starting at 250H contains “America”, write a program to transfer the bytes into RAM locations starting at 40H. Solution of (a) This method uses a counter： ORG 0000 MOV DPTR,#MYDATA ;Initialization MOV R0,#40H MOV R2,#7 BACK: CLR A MOVC A,@A+DPTR MOV @R0,A INC DPTR INC R0 DJNZ R2,BACK HERE: SJMP HERE ORG 250H MYDATA: DB “AMERICA” END ROM RAM 0000 90 0001 02 0002 50 0003 78 : 0250 41 0251 4D 0252 45 0253 52 40 41 41 4D 42 45 43 52 44 49 45 43 46 41 47 4E AME R I C A N A 41 R0 40 DPTR 02 50

Example 5-7 (2/2) Solution of (b) This method uses null char for end of string： ORG 0000 MOV DPTR,#MYDATA MOV R0,#40H ;No “MOV R2,#7” BACK: CLR A MOVC A,@A+DPTR JZ HERE ;if A=0 MOV @R0,A ;leave the block INC DPTR INC R0 SJMP BACK HERE: SJMP HERE ORG 250H MYDATA: DB “AMERICA”,0 ;notice null char ;for end of string END

Example 5-8 Write a program to get the x value from P1 and send x2 to P2, continuously. Solution: ORG 0 MOV DPTR,#XSQR_TABLE MOV A,#0FFH MOV P1,A ;P1 as INPUT PORT BACK: MOV A,P1 ;GET X MOVC A,@A+DPTR ;Count the addr. MOV P2,A ;Issue it to P2 SJMP BACK ORG 300H XSQR_TABLE: DB 0,1,4,9,16,25,36,49,64,81 END Please trace the program by set A=0, then A=1, then A=2,....

Example 5-9 Answer the following questions for Example 5-8. (a) Indicate the content of ROM locations 300-309H. (b) At what ROM location is the square of 6, and what value should be there? (c) Assume that P1 has a value of 9: what value is at P2 (in binary)? Solution: (a) All values are in hex. 300 = (00) 301 = (01) 302 = (04) 303 = (09) 304 = (10) 4×4=16=10H 305 = (19) 5×5=25=19H 306 = (24) 6×6=36=24H 307 = (31) 308 = (40) 309 = (51) (b) ROM Addr.=306H; the value 24H=36 (c) P2 = 01010001B=51H=81 in decimal.

You are able to List the 5 addressing modes of the 8051 microcontroller Contrast and compare the addressing modes Code 8051 Assembly language instructions using each addressing mode List the SFR（special function registers）address Discuss how to access the SFR Manipulate the stack using direct addressing mode Code 8051 instructions to manipulate a look-up table

Homework Chapter 5 Problems：2,3,8,11,12,13 Note: Please write and compile the program of Problems 8,11,12,13.