Wat gaan we doen? harhaling data types

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Presentation transcript:

Wat gaan we doen? harhaling data types herhaling memory adressing modes gebruik van de stack load/store multiple instructions uitleg SET_LEDS uitleg Kitt Hogeschool van Utrecht / Institute for Computer, Communication and Media Technology

ARM7 data types Word is 32 bits long. Half word is 16-bits long (ARM7TDMI) Word can be divided into four bytes. ARM addresses 32 bits. Address refers to byte. Address 4 starts at byte 4. Can be configured at power-up as either little- or big-endian mode. Hogeschool van Utrecht / Institute for Computer, Communication and Media Technology

Little- and big-endian storage r0 = 0x11223344 11 22 33 44 STR r0,[r1] 3 2 1 0 0 1 2 3 11 22 33 44 11 22 33 44 LDRB r2,[r1] 00 00 00 44 00 00 00 11 little-endian big-endian Hogeschool van Utrecht / Institute for Computer, Communication and Media Technology

Addressing mode: Base Register The memory location to be accessed is held in a base register STR r0, [r1] ; Store contents of r0 to location pointed to ; by contents of r1. LDR r2, [r1] ; Load r2 with contents of memory location ; pointed to by contents of r1. r1 0x200 Base Register Memory 0x5 r0 Source Register for STR r2 Destination Register for LDR Hogeschool van Utrecht / Institute for Computer, Communication and Media Technology

Addressing mode: Pre-indexed Base Register Memory 0x5 r0 Source Register for STR Offset 12 0x20c Example: STR r0, [r1,#12] To store to location 0x1f4 instead use: STR r0, [r1,#-12] To auto-increment base pointer to 0x20c use: STR r0, [r1, #12]! If r2 contains 3, access 0x20c by multiplying this by 4: STR r0, [r1, r2, LSL #2] Hogeschool van Utrecht / Institute for Computer, Communication and Media Technology

Addressing mode: Post-indexed Original Base Register Memory 0x5 r0 Source Register for STR Offset 12 0x20c Updated Base Register Example: STR r0, [r1], #12 To auto-increment the base register to location 0x1f4 instead use: STR r0, [r1], #-12 If r2 contains 3, auto-incremenet base register to 0x20c by multiplying this by 4: STR r0, [r1], r2, LSL #2 Hogeschool van Utrecht / Institute for Computer, Communication and Media Technology

assembler instructie formaat : multiple words van en naar geheugen (block transfer instructies) STMIA R0, { R1-R9 } STMIA R0!, { R1-R9 } STMIB R0, { R1-R9 } ; DA, DB STMNEIA R0, { R1-R9 } Hogeschool van Utrecht / Institute for Computer, Communication and Media Technology

Block Data Transfer instructie code The Load and Store Multiple instructions (LDM / STM) allow betweeen 1 and 16 registers to be transferred to or from memory. The transferred registers can be either: Any subset of the current bank of registers (default). Any subset of the user mode bank of registers when in a priviledged mode (postfix instruction with a ‘^’). 28 31 22 16 23 21 15 27 20 19 24 Cond 1 0 0 P U S W L Rn Register list Condition field Base register Each bit corresponds to a particular register. For example: Bit 0 set causes r0 to be transferred. Bit 0 unset causes r0 not to be transferred. At least one register must be transferred as the list cannot be empty. Up/Down bit 0 = Down; subtract offset from base 1 = Up ; add offset to base Load/Store bit 0 = Store to memory 1 = Load from memory Pre/Post indexing bit 0 = Post; add offset after transfer, 1 = Pre ; add offset before transfer Write- back bit 0 = no write-back 1 = write address into base PSR and force user bit 0 = don’t load PSR or force user mode 1 = load PSR or force user mode Hogeschool van Utrecht / Institute for Computer, Communication and Media Technology

Stack A stack is an area of memory which grows as new data is “pushed” onto the “top” of it, and shrinks as data is “popped” off the top. Two pointers define the current limits of the stack. A base pointer used to point to the “bottom” of the stack (the first location). A stack pointer used to point the current “top” of the stack. PUSH {1,2,3} POP 1 2 3 BASE SP Result of pop = 3 SP 2 1 SP BASE BASE Hogeschool van Utrecht / Institute for Computer, Communication and Media Technology

subroutine call and return BLX subroutine ; continue here subroutine: ; do something MOV PC, LR Hogeschool van Utrecht / Institute for Computer, Communication and Media Technology

Stacks and Subroutines One use of stacks is to create temporary register workspace for subroutines. STMFD sp!,{r0-r12, lr} ; stack all registers ........ ; and the return address ........ LDMFD sp!,{r0-r12, pc} ; load all the registers ; and return automatically See the chapter on the ARM Procedure Call Standard in the SDT Reference Manual for further details of register usage within subroutines. If the pop instruction also had the ‘S’ bit set then the transfer of the PC when in a priviledged mode would also cause the SPSR to be copied into the CPSR (see exception handling module). Hogeschool van Utrecht / Institute for Computer, Communication and Media Technology

Stack Operation Traditionally, a stack grows down in memory, with the last “pushed” value at the lowest address. The ARM also supports ascending stacks, where the stack structure grows up through memory. The value of the stack pointer can either: Point to the last occupied address (Full stack) and so needs pre-decrementing (ie before the push) Point to the next occupied address (Empty stack) and so needs post-decrementing (ie after the push) The stack type to be used is given by the postfix to the instruction: STMFD / LDMFD : Full Descending stack STMFA / LDMFA : Full Ascending stack. STMED / LDMED : Empty Descending stack STMEA / LDMEA : Empty Ascending stack Note: ARM Compiler will always use a Full descending stack. Hogeschool van Utrecht / Institute for Computer, Communication and Media Technology

SET_LEDS SET_LEDS: @ save registers stmfd sp!, { r0-r2, lr } @ set LEDs that must be turned on mov r0, r0, LSL #8 ldr r1, =IOSET str r0, [ r1 ] @ clear LEDs that must be turned off mvn r0, r0 ldr r1, =IOCLR str r0, [ r1 ] @ save registers and return ldmfd sp!, { r0-r2, pc } Hogeschool van Utrecht / Institute for Computer, Communication and Media Technology

Kitt @ initialisation ldr r2, =1 @ rightmost LED on ldr r3, =1 @ means: shift left loop: cmp r3, #1 moveq r2, r2, LSL #1 movne r2, r2, LSR #1 cmp r2, #1 moveq r3, #1 cmp r2, #0x80 moveq r3, #0 b loop Hogeschool van Utrecht / Institute for Computer, Communication and Media Technology

doen Kitt afmaken Toon aan hoe snel een interne instructie uitgevoerd wordt een I/O instructie uitgevoerd wordt Maak een ‘echte’ Delay_uS subroutine Hogeschool van Utrecht / Institute for Computer, Communication and Media Technology