1. Lecture 8: Loading and Storing to Memory CS 2011 Fall 2014, Dr. Rozier

2. MEMORY BASICS

3. The Memory Hierarchy

4. RISC Load/Store Architecture Processor Registers Add Cmp Load Etc Store Memory

5. Single Register Data Transfer LDR/STR – load or store – {cond}{size} Rd, Size is an option suffix – LDR, No suffix? Transfer a word – LDRB, Transfer an unsigned byte – LDRSB, Transfer a signed byte – LDRH, Transfer an unsigned half word – LDRSH, Transfer a signed half word

6. Addressing Address can be… – An expression – A pre-indexed address [Rn, ]{!} [Rn, {-}Rm]{!} [Rn, {-}Rm count]{!} – A post-indexed address [Rn], [Rn], {-}Rm [Rn], {-}Rm count

7. Addressing Pre-indexing – Modify Rn to a new index, and use it. – If the “!” postfix is included, write back the pre- index to Rn. Post-indexing – Use Rn as the index. – Write back the result of the post-indexing to Rn.

8. Addressing Pseudo-instruction – ldr r0, =myvalue The compiler substitutes a PC relative load to an appropriate literal pool. – ldr r0, [pc, #8]

9. Memory Puzzle mov sp, #135, lsl #3 mov r0, #0 mov r1, #1 mov r2, #2 mov r3, #3 mov r4, #4 mov r5, #5 str r0, [sp], #4 str r1, [sp, #4] str r1, [sp], #4 str r2, [sp!, #4] str r3, [sp, #4] ldr r2, [sp], -r4

10. ADVANCED MEMORY OPS

11. Multiple Register Data Transfer LDM, STM – load/store multiple – {cond} Rn{!}, Modes control how Rn is changed – IA – increment after – IB – increment before – DA – decrement after – DB – decrement before The ! suffix to Rn tells the operation to write the results back when done.

12. Importance of Modes?

13. What does this instruction mean? LDMIA r0, {r3, r7}

14. What does this instruction mean? LDMIA r0, {r3-r7}

15. What does this instruction mean? STMDB r1!, {r6-r8}

16. Memory Puzzle mov sp, #135, lsl #3 mov r0, #0 mov r1, #1 mov r2, #2 mov r3, #3 mov r4, #4 mov r5, #5 stmia r13, {r0-r5} stmib r13, {r1-r4} ldmia r13, {r0-r5} Checkpoint1: stmia r13!, {r1-r3} ldmda r13!, {r1-r3} Checkpoint2:

17. RISC Load/Store Architecture Processor Registers Add Cmp Load Etc Store Memory

18. THE STACK

19. The Stack There is nothing special about the stack – It’s a conceptual abstraction we use to implement higher features. – ARM has no new instructions to implement the stack.

20. The Stack ARM assembler does provide “pseudo- instructions” – Pseudo-instructions are nicknames for existing instructions that make our job easier FD – full descending ED – empty descending FA – full ascending EA – empty ascending

21. Work out how FD,ED,FA,EA map to our real instructions.

22. The Stack While we could use any method (so long as we are consistent), it is rare to see anything but a full descending stack. The pseudo-instructions PUSH and POP assume a full descending stack

23. PUSH and POP PUSH{cond} POP{cond} PUSH and POP assume use of the stack pointer.

24. Memory Puzzle mov sp, #135, lsl #3 mov r0, #0 mov r1, #1 mov r2, #2 mov r3, #3 mov r4, #4 mov r5, #5 push {r0, r4-r5} pop {r1} push {r1-r3} pop {r2-r5}

25. For next time Read Chapter 3 Sections 3.1 – 3.5