Index BaseDisplacement Scale 1, 2, 4, 8 Segmentation unit Paging unit Virtual address Linear address Physical address Effective addressSelector 1520 Segment register Figure Address generation in the IA-32 architecture +
SA SS B + SC SD SS1 S SE SS F SG SS H + SS1 S SS1 S + SS1 S WS LOAD ADDM LOAD LOAD DIV DEL LOAD MPYM LOAD ADDM DIV DEL ADD DIV DEL STOR A B C D E F G H W combined StepOperation performedMachine instruction (a) Operations to be performed and the necessary machine instructions ab+ cd ef gh+Stack pointer (b) Temporary results stored in the stack after step 9 Figure 11.9.Stack usage in processing the expressionwab+ cdef gh+ + =