7 CX - Count reg Loop counter REP – repeat [in string operations] CL as a count in instructions that shift and rotate bits
8 DX – data regUsed in MUX and DivisionUsed in I/O ops.
9 Address reg – to hold addr of an instruction or data Registers(16-bit) registers:Data reg. – to hold data for an op.Address reg – to hold addr of an instruction or dataStatus reg / FLAGS reg
10 2. Address reg.a. Segment reg CS, DS, SS, ES b. Pointer & index reg Si, DI, SP, BP, IP
11 a. Segment regs. – 4 Each memory byte has an address 8086 proc assigns a 20-bit physical address to its memory locationsIt is possible to address 220 = 1,048,576 = 1 MB of memory1st byte’s address:2nd byte’s address:3rd …
13 16-bit processor!20-bit address!!Q. Where lies the problem??20-bit addresses are bigger to fit in a 16-bit reg or memory word.
14 টুকরা টুকরা Memory Segment Partioning memory into segmentsA memory segment is a block of 216 or 64K consecutive memory bytesSegment number – for each segmentQ: How many bits for a segment number? 16 bits! – as each block has byte of 216
15 Segment: Offset address Within a segment, a memory location is specified by giving an offset.Memory location Segment no. + OffsetSegment:Offset Logical Address
16 A4FB:4827h offset 4827, within segment A4FB Q: How to get 20-bit physical address?Shift the segment address 4 bits to the left (eqv. to multiplying by 10h)Add the offsetSo, the Physical Address for A4FB:4827h???
17 Logical Address: A4FB:4827h A 4 F B A h Physical Address 20-bit Physical Address 16-bit Segment [after shifting] + 16-bit Offset
19 CS, DS, SS, ES Machine lang. - instruction [code] - data - stack [data structure – used by the proc to implement procedure/function calls]These are loaded into different memory segments,Code segment - CSData segment - DSStack segment - SS
20 ES – extra segment regIf a prog needs to access a second data segment, use the ES register!At any time – only 4 mem locations addressed by the 4 segment reg [C/D/S/E] are accessibleQ: How many memory segments can remain active at a time? only 4 memory segments are active
21 Address reg – to hold addr of an instruction or data Registers(16-bit) registers:Data reg. – to hold data for an op.Address reg – to hold addr of an instruction or dataStatus reg / FLAGS reg
22 SI, DI, SP, BP, IP 2. Address reg. a. Segment reg CS, DS, SS, ES b. Pointer & index reg SI, DI, SP, BP, IP
23 b. Pointer & Index reg.Stack pointer – SP – with SS [??] to access the stack segmentBase p – BP – mainly to access data on the stack. Also to access data in other segments.Source index – SI – to point to memory locations in the data segment addressed by DS [??]Destination index – DI same as SI – but for instructions of string operations – to access memory locations – addressed by ES [??]
24 Instruction pointer [IP] reg. Q: Which registers so far are for data access or to access instructions?All above are for data access!CS [Code segment – under Segment reg.] contains segment no. of the next instruction.IP contains the offset
25 IP is updated each time an instruction is executed – so that it will point to the next instruction. Q: Can IP reg be directly manipulated by an instruction? Unlike other registers - NO!
26 Status reg / FLAGS reg Registers (16-bit) registers: Data reg. – to hold data for an op.Address reg – to hold addr of an instruction or dataStatus reg / FLAGS reg
27 3. Status Reg./FLAGS reg. To indicate the status of the mP. 1 flag == 1 bitY/N9 active bits – out of ?? Bits?Q: Types of flags? Some names?Status flags – Zero flag, Carry flag, sign flag, parity, auxiliary flagControl flags – interrupt flag, trap flag, direction flag and overflow flag