Dr. Clincy Professor of CS

Slides:



Advertisements
Similar presentations
©2004 Brooks/Cole FIGURES FOR CHAPTER 12 REGISTERS AND COUNTERS Click the mouse to move to the next page. Use the ESC key to exit this chapter. This chapter.
Advertisements

State-machine structure (Mealy)
Registers and Counters
CS 140 Lecture 10 Sequential Networks: Implementation Professor CK Cheng CSE Dept. UC San Diego 1.
Appendix A Logic Circuits. Logic circuits Operate on binary variables that assume one of two distinct values, usually called 0 and 1 Implement functions.
Sequential Circuits1 DIGITAL LOGIC DESIGN by Dr. Fenghui Yao Tennessee State University Department of Computer Science Nashville, TN.
SYEN 3330 Digital SystemsJung H. Kim 1 SYEN 3330 Digital Systems Chapter 6 – Part 1.
Dr. ClincyLecture1 Appendix A – Part 2: Logic Circuits Current State or output of the device is affected by the previous states Circuit Flip Flops New.
Review and Overview. Review  Combinational logic circuit – Decoder, Encoder, Multiplexer, De-multiplexer, Full Adder, Multiplier  Sequential logic circuit.
Sequential Circuits and Finite State Machines Prof. Sin-Min Lee
Chapter 3 Continued Logic Gates Logic Chips Combinational Logic Timing Sequential Logic Flip Flops Registers Memory State Machines.
CSCE 211: Digital Logic Design
ECE 301 – Digital Electronics Introduction to Sequential Logic Circuits (aka. Finite State Machines) and FSM Analysis (Lecture #17)
ECE 331 – Digital Systems Design Introduction to Sequential Logic Circuits (aka. Finite State Machines) and FSM Analysis (Lecture #19)
Sequential logic and systems
Sequential Circuits Chapter 4 S. Dandamudi To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S.
Lecture 10 Topics: Sequential circuits Basic concepts Clocks
CHAPTER 12 REGISTERS AND COUNTERS
CSCE 211: Digital Logic Design Chin-Tser Huang University of South Carolina.
Chapter 8 -- Analysis and Synthesis of Synchronous Sequential Circuits.
1 Lecture #12 EGR 277 – Digital Logic Synchronous Logic Circuits versus Combinational Logic Circuits A) Combinational Logic Circuits Recall that there.
2017/4/24 CHAPTER 6 Counters Chapter 5 (Sections )
1 Lecture 22 Sequential Circuits Analysis. 2 Combinational vs. Sequential  Combinational Logic Circuit  Output is a function only of the present inputs.
Computer Organization & Programming Chapter 5 Synchronous Components.
Computer Architecture and Organization Unit -1. Digital Logic Circuits – Logic Gates – Boolean Algebra – Map Simplification – Combinational Circuits –
CHAPTER 6 Sequential Circuits’ Analysis CHAPTER 6 Sequential Circuits’ Analysis Sichuan University Software College.
A sequential logic circuit (a.k.a. state machine) consists of both combinational logic circuit(s) and memory devices (flip flops). The combinational circuits.
© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Logic Design Dr. Oliver Faust.
Dr. ClincyLecture Slide 1 CS Chapter 3 (3A and ) Part 8 of 8 Dr. Clincy Professor of CS.
Logic Design (CE1111 ) Lecture 6 (Chapter 6) Registers &Counters Prepared by Dr. Lamiaa Elshenawy 1.
CSE260 Revision Final. MSI a) Implement the following function with 8:1 mux F(A,B,C,D) =∑(0,1,3,4,8,9,15) b) Construct AND, OR and NOT gates using 2:1.
Dr. Clincy Professor of CS
CS Chapter 3 (3A and ) Part 6 of 8
CS Chapter 3 (3A and ) – Part 5 of 5
Learning Outcome By the end of this chapter, students are expected to be able to: Design State Machine Write Verilog State Machine by Boolean Algebra and.
SLIDES FOR CHAPTER 12 REGISTERS AND COUNTERS
FIGURE 5.1 Block diagram of sequential circuit
Digital Design Lecture 9
CSCE 211: Digital Logic Design
Dr. Clincy Professor of CS
Sequential Circuits Most digital systems like digital watches, digital phones, digital computers, digital traffic light controllers and so on require.
CS Chapter 3 (3A and ) – Part 4 of 5
Asynchronous Inputs of a Flip-Flop
ECE 301 – Digital Electronics
CSE 140 MT 2 Review By Daniel Knapp.
T Flip-Flop A T (toggle) flip-flop is a complementing flip-flop and can be obtained from a JK flip-flop when the two inputs are tied together. When T.
CSCE 211: Digital Logic Design
CSCE 211: Digital Logic Design
Jeremy R. Johnson Mon. Apr. 3, 2000
CSCE 211: Digital Logic Design
Recap D flip-flop based counter Flip-flop transition table
Digital Logic & Design Dr. Waseem Ikram Lecture No. 31.
Dr. Clincy Professor of CS
CSE 370 – Winter Sequential Logic-2 - 1
Dr. Clincy Professor of CS
CSE 370 – Winter Sequential Logic - 1
Dr. Clincy Professor of CS
Instructor: Alexander Stoytchev
EET107/3 DIGITAL ELECTRONICS 1
Lecture 17 Logistics Last lecture Today HW5 due on Wednesday
Reference: Chapter 5 Sequential Circuits Moris Mano 4th Ediditon
Lecture No. 32 Sequential Logic.
Combinational Circuits
EGC 442 Introduction to Computer Architecture
SYEN 3330 Digital Systems Chapter 6 – Part 3 SYEN 3330 Digital Systems.
Systems Architecture I
ANALYSIS OF SEQUENTIAL CIRCUIT LOGIC DIAGRAM
Lecture 17 Logistics Last lecture Today HW5 due on Wednesday
CSCE 211: Digital Logic Design
EGR 2131 Unit 12 Synchronous Sequential Circuits
Presentation transcript:

Dr. Clincy Professor of CS CS 3501 - Chapter 3 (3A and 10.2.2) Dr. Clincy Professor of CS Finish Ch 3 Introduce Multisim Dr. Clincy Lecture Slide 1 1

Recall Previous Covered Flip Flops SR Flip Flop D Flip Flop T Flip Flop JK Flip Flop Dr. Clincy Lecture Slide 2 2

NOTE Your book doesn’t do a good job in showing you how to derive or design sequential circuits (using state and state assignment tables) – the lecture will do so – please pay close attention to the lecture in understanding how to derive sequential circuits. Dr. Clincy Lecture Slide 3 3

Combinatorial or Combinational Logic Recall Circuit New Input Current State or Output Combinatorial or Combinational Logic Current State or output of the device is only affected by the current inputs Examples: Decoders Multiplexers Current State or output of the device is affected by the previous states Circuit Flip Flops New Input Previous State or Output Current State or Output Sequential Logic Examples: Shift Registers Counters Dr. Clincy Lecture

Sequential Circuit – State Diagram If x=0, count up, If x=1, count down Interested when 2 is realized – z=1 when reach 2, else z=0 If at 0 and x=0, count up to 1 (and z=0) If at 0 and x=1, count down to 3 (and z=0) x = z ¤ 1 S2 S3 State diagram of a mod-4 up/down counter that detects the count of 2. S1 S0 State diagram describes the functional behavior without any reference to implementation Dr. Clincy Lecture

Sequential Circuit – State Table Can represent the info in the state diagram in a state table x = z ¤ 1 S2 S3 State diagram of a mod-4 up/down counter that detects the count of 2. S1 S0 Dr. Clincy Lecture

Sequential Circuit – Equation Inputs – y2,y1,x Outputs –Y2, Y1 Dr. Clincy Lecture

Sequential Circuit – Circuit Design D Flip Flops used to store values of the two state variables between clock pulses Output from Flip Flops is the present-state of the variables Input, D, of the Flip Flops is the next-state of the variables Dr. Clincy Lecture

Finite State Machine Model The example we just implemented is an example of a “Finite State Machine” - is a model or abstraction of behavior composed of a finite number of states, transitions between those states, and actions Dr. Clincy Lecture

Multisim Intro What is Multisim ? Learning Multisim Is SPICE based An electronic design automation software environment Provides schematic capture Provides interactive circuit simulation Provides circuit analysis tools Provides integration to a graphical PCB layout environment (Ultiboard) – has a 3D feature Also provides integration to a system-design and development environment (LabVIEW) Learning Multisim Watch Multisim demos and illustrations Locate Multisim - cseview.kennesaw.edu (access vs install) – look under “N” for “NI Multisim” (National Instruments) Using Multisim, implement the Full Adder circuit on page 157 using the same chips you used on the breadboard Work individually YOU WILL ONLY USE ABOUT 10% OF MULTISIM’S FEATURES

Ultiboard – 3D PCB feature