UL Fast Feedback and HARQ Feedback Channel Structure

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UL Fast Feedback and HARQ Feedback Channel Structure IEEE 802.16 Presentation Submission Template (Rev. 9) Document Number: C80216m-09/0014 Date Submitted: 2009-01-05 Source: Jinyoung Chun (jychun03@lge.com) Youngseob Lee (ys_lee@lge.com) Sukwoo Lee (sugoo@lge.com) Bin-chul Ihm (bcihm@lge.com) LG Electronics *<http://standards.ieee.org/faqs/affiliationFAQ.html> Re: “802.16m SDD text”: IEEE 802.16m-08/052, “Call for Comments on Project 802.16m System Description Document (SDD)” Target topic: 11.9 UL Control Structure Base Contribution: None Purpose: Discussion and adoption for 802.16m SDD Notice: This document does not represent the agreed views of the IEEE 802.16 Working Group or any of its subgroups. It represents only the views of the participants listed in the “Source(s)” field above. It is offered as a basis for discussion. It is not binding on the contributor(s), who reserve(s) the right to add, amend or withdraw material contained herein. Release: The contributor grants a free, irrevocable license to the IEEE to incorporate material contained in this contribution, and any modifications thereof, in the creation of an IEEE Standards publication; to copyright in the IEEE’s name any IEEE Standards publication even though it may include portions of this contribution; and at the IEEE’s sole discretion to permit others to reproduce in whole or in part the resulting IEEE Standards publication. The contributor also acknowledges and accepts that this contribution may be made public by IEEE 802.16. Patent Policy: The contributor is familiar with the IEEE-SA Patent Policy and Procedures: <http://standards.ieee.org/guides/bylaws/sect6-7.html#6> and <http://standards.ieee.org/guides/opman/sect6.html#6.3>. Further information is located at <http://standards.ieee.org/board/pat/pat-material.html> and <http://standards.ieee.org/board/pat >.

Contents UL Fast Feedback Channel (FFBCH) The channel allocation Primary FFBCH structure and the performance Secondary FFBCH and the performance Appendix Simulation conditions Code sequence and generator matrix UL HARQ Feedback Channel (HFBCH) The channel structure and the performance Proposed texts in SDD

UL Fast Feedback Channel

UL FFBCH Allocation The Region of UL FFBCHs A FFBCH Structure It starts at pre-determined location indicated by DL control message or after UL HFBCH region without indication. FFBCH and HFBCH can FDM in a DRU. ABS indicates the UL subframe index and channel index to AMS. A FFBCH Structure It consists of three 2x6 Fastfeedback Mini-Tile (FMT)s. Each FMT is located in each tile of a DRU. One DRU consists of 9 FMTs and it carries 3 FFBCHs. There are two types of FFBCH: primary FFBCH and secondary FFBCH. The detail structures of these FFBCHs are in next pages.

Primary FFBCH Option 1. Structure for Primary FFBCH Option 2. Two schemes are considered in terms of performance gain and capacity gain Option 1. Structure for Non-coherent detection Resource mapping One FFBCH is mapped on 1st mini-tile Two permuted sequences from the FFBCH are mapped on 2nd and 3rd mini-tiles respectively Option 2. Structure for coherent detection Resource mapping Two FFBCHs is multiplexed with orthogonal sequences of length 2 on three mini-ties 4 pilots in each mini-tile are used.

Primary FFBCH (Option 1) The performance of Primary FFBCH (SNR) Conditions Non-coherent detection Intel’s code: C80216m-UL_PHY_Ctrl-08_065r1 LG’s code: Appendix A Comparison LG’s codes are similar or slightly better than Intel’s in PedB3, VehA120 Only LG’s code meets 1% BLER in VehA350

Primary FFBCH (Option 1) The performance of Primary FFBCH (Eb/No)

Primary FFBCH (Option 2) The performance of Primary FFBCH (SNR) Conditions Intel: Non-coherent detection for 1 user LG: Coherent detection for 2 users. (Generator matrix: Appendix B) Comparison LG Option 2 has about 2dB loss than Intel’s in low speed but outperforms in high speed. LG Option 2 has double capacity than Intel’s.

Primary FFBCH (Option 2) The capacity calculation Assumption Capacity Analysis LG’s option 2 has less UL FFBCH overhead about 4.3% than Intel and 13% than 16e scheme. Bandwidth 10MHz Period of FFBCH 4 frames (= 1superframe) Active users 150 # of PRUs in a frame 144 DL/UL ratio 5:3 LG (Opt. 2) LG (Opt.1) Intel Motorola 16e # of FBCHs per PRU 6 3 4 1.5 Required PRUs in a frame 6.25 12.5 9.38 50 Overhead ratio 4.34% 8.68% 6.51% 17.36%

Secondary FFBCH Secondary FFBCH Structure MCS 4 pilots in a mini-tile are used. Three mini-tiles consist of a FFBCH supporting 7~24 information bits. MCS The information is encoded to 48 bits and modulated to 24 QPSK symbols. Information under 12 bits are encoded to 48bits by block code (48x12). Information over 12 bits are encoded to two 24bits by block code (24x12).

Secondary FFBCH The performance of Secondary FFBCH (SNR) Conditions Coherent detection Intel: 2 pilots in a tile [C80216m-UL_PHY_Ctrl-08_065r1] LG: 4 pilots in a tile [Generator matrix: Appendix B] Comparison LG’s code outperforms Intel’s except 24bits in PedB 3km/h.

Secondary FFBCH The performance of Secondary FFBCH (Eb/No)

Simulation conditions Code sequence Appendix Simulation conditions Code sequence

Appendix. Simulation condition Parameters Values Channel Bandwidth 10MHz Over-sampling Factor 28/25 FFT Size 1024 Cyclic prefix (CP) ratio 1/8 Resource Three distributed tiles (2x6 tile) Multiplexing scheme FDM Coding & Modulation Block code & QPSK Channel condition PedB 3km/h, VehA 120km/h, 350km/h The number of antennas 1 Tx MS, 2 Rx BS Impairments Time offset & freq offset= 0 Tx Power Identical transmit power per OFDM symbol Channel estimation 2D-MMSE Receiver MLD

Appendix A. Code sequence Sequences of Primary FFBCH (Option 1) 4bits: sequence 0~15 5bits: sequence 0~31 6bits: sequence 0~63 Index Sequence 0,0,0,0,1,0,0,1,1,1,0,1 22 0,0,1,1,0,1,1,0,0,0,0,0 44 0,0,1,1,1,0,0,0,1,1,0,1 1 1,0,0,1,1,0,1,1,0,0,1,1 23 1,0,1,0,0,1,0,0,1,1,1,0 45 1,0,1,0,1,0,1,0,0,0,1,1 2 0,1,1,1,1,1,0,1,1,0,1,1 24 0,0,0,1,0,1,0,0,1,1,1,1 46 0,1,1,1,0,0,1,1,0,1,1,0 3 1,1,1,0,1,1,1,1,0,1,0,1 25 1,0,0,0,0,1,1,0,0,0,0,1 47 1,1,1,0,0,0,0,1,1,0,0,0 4 0,0,1,0,1,1,1,0,1,0,0,1 26 0,0,1,1,0,0,1,1,1,0,1,1 48 0,0,0,1,1,0,1,0,0,0,1,0 5 1,0,1,1,1,1,0,0,0,1,1,1 27 1,0,1,0,0,0,0,1,0,1,0,1 49 1,0,0,0,1,0,0,0,1,1,0,0 6 0,1,0,1,1,0,1,0,1,1,1,1 28 0,1,0,0,0,1,1,1,1,1,0,1 50 0,1,0,1,0,0,0,1,1,0,0,1 7 1,1,0,0,1,0,0,0,0,0,0,1 29 1,1,0,1,0,1,0,1,0,0,1,1 51 1,1,0,0,0,0,1,1,0,1,1,1 8 0,1,0,1,1,1,1,1,0,1,0,0 30 0,1,1,0,0,0,0,0,1,0,0,1 52 0,0,1,1,1,1,0,1,0,1,1,0 9 1,1,0,0,1,1,0,1,1,0,1,0 31 1,1,1,1,0,0,1,0,0,1,1,1 53 1,0,1,0,1,1,1,1,1,0,0,0 10 0,1,1,1,1,0,0,0,0,0,0,0 32 0,0,0,0,0,1,1,1,0,0,0,0 54 0,1,1,1,0,1,1,0,1,1,0,1 11 1,1,1,0,1,0,1,0,1,1,1,0 33 1,0,0,1,0,1,0,1,1,1,1,0 55 1,1,1,0,0,1,0,0,0,0,1,1 12 0,0,0,0,1,1,0,0,0,1,1,0 34 0,1,0,0,1,1,0,0,1,0,1,1 56 0,0,0,0,0,0,1,0,1,0,1,1 13 1,0,0,1,1,1,1,0,1,0,0,0 35 1,1,0,1,1,1,1,0,0,1,0,1 57 1,0,0,1,0,0,0,0,0,1,0,1 14 0,0,1,0,1,0,1,1,0,0,1,0 36 0,0,1,0,0,0,0,0,0,1,0,0 58 0,1,0,0,1,0,0,1,0,0,0,0 15 1,0,1,1,1,0,0,1,1,1,0,0 37 1,0,1,1,0,0,1,0,1,0,1,0 59 1,1,0,1,1,0,1,1,1,1,1,0 16 0,1,0,0,0,0,1,0,0,1,1,0 38 0,1,1,0,1,0,1,1,1,1,1,1 60 0,0,1,0,0,1,0,1,1,1,1,1 17 1,1,0,1,0,0,0,0,1,0,0,0 39 1,1,1,1,1,0,0,1,0,0,0,1 61 1,0,1,1,0,1,1,1,0,0,0,1 18 0,1,1,0,0,1,0,1,0,0,1,0 40 0,0,0,1,1,1,1,1,1,0,0,1 62 0,1,1,0,1,1,1,0,0,1,0,0 19 1,1,1,1,0,1,1,1,1,1,0,0 41 1,0,0,0,1,1,0,1,0,1,1,1 63 1,1,1,1,1,1,0,0,1,0,1,0 20 0,0,0,1,0,0,0,1,0,1,0,0 42 0,1,0,1,0,1,0,0,0,0,1,0 21 1,0,0,0,0,0,1,1,1,0,1,0 43 1,1,0,0,0,1,1,0,1,1,0,0

Appendix B. Code sequence Generator matrix for Primary (Option 2) and Secondary FFBCH For Primary channel (option 2), index 0~23 are used. For Secondary channel of 48bits code, index 0~47 are used. For Secondary channel of 24bits code, index 0~23 are used. Index v0 v1 v2 v3 v4 v5 v6 v7 v8 v9 v10 v11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Index v0 v1 v2 v3 v4 v5 v6 v7 v8 v9 v10 v11 24 1 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47

UL HARQ Feedback Channel

UL HFBCH Allocation The Region of UL HFBCHs A HFBCH structure It starts at pre-determined location. FFBCH and HFBCH can FDM in a DRU. AMS transmits UL HFBCH at a pre-determined location with respect to the corresponding DL transmission. A HFBCH structure It consists of three 1x2 HARQ feedback Mini-Tile (HMT)s. Each HMT is located in each tile of a DRU. One LRU consists of 54 HMTs and it carries 18 HFBCHs. The detail structure and mapping rule are in next pages.

UL HFBCH The structure Coherent detection A HARQFB channel consists of three 1x2 tiles. It is power-boosted by 7.7dB. It can carry a ACK/NACK by BPSK or two ACK/NACKs by QPSK.

UL HFBCH The performance of UL HFBCH (Eb/No) Conditions Comparison An ACK or NACK in a HFBCH Coherent detection vs. Non-coherent detection 2x6 HMT vs. 1x2 HMT Comparison 1x2 HMT is better than 2x6 HMT and especially 2x6 HMT has error floor in 350km/h. Coherent and non-coherent detection of 1x2 HMT show the same performance.

UL HFBCH The performance of UL HFBCH (Eb/No) Conditions Comparison 1x2 HMT Coherent detection: Two ACKs or NACKs in a HFBCH Non-coherent detection: Two ACKs or NACKs in two HFBCHs Comparison Coherent detection is better than non-coherent detection except in high speed. Coherent detection can carry more ACK/NACK in a HFB channel.

Proposed SDD texts UL FFBCH

Proposed SDD texts (Cont’d)

Proposed SDD texts (Cont’d) UL HFBCH