Physics of Semiconductor Devices Institute of Microelectronics and Optoelectronics Zhang Wei

3.7 BASE RESISTANCE Base resistance Extrinsic resistance RBX Intrinsic resistance RBI Extrinsic resistance RBX n ＋ p RBX RBI n EXRINSIC BASE INTRINSIC BASE

nb: the number of base contacts RBX＝ RSBX( bb /lb) +RCON nB RCON: contact resistance lb＆Rb : length and width of the extrinsic base region nb: the number of base contacts RBI = C RSBI( be/le) nB 2 le＆be: emitter length and width C: a constant

measurement of RSBI p n + I I n n p n + p n

Comparison between RBX & RBI RBX : a constant and very easy to model RBI : a strong function of current In particular, RBI decreases markedly at very high collector currents. caused by current crowding due to the lateral flow of base current underneath the emitter the lateral flow of base current underneath the emitter VBE varies with distance VBE is highest at the emitter edge closest to the base contact the emitter current ‘crowds’ towards the base contact

3.8 COLLECTOR/BASE CAPACITANCE Collector capacitance is another parameter which is very important in determining the AC performance of a bipolar transistor. The importance is decided by the Miller effect. + n P CJCX CJCI n EXTRINSIC AREA INTRINSIC AREA

determined emitter geometry & collector doping concentration CJCI The collector capacitance the necessity of having space to make contact to the base of the transistor CJCX limited Attention: The emitter geometry is limited by lithography constraints, and the collector doping concentration by the need to suppress high-current effects such as base widening. Conclusion: The designer has very little control over the intrinsic component of the collector capacitance.

(exp (exp ) [(exp ) ] (exp ) (exp ) (exp (exp (exp 3.9 THE SPICE BIPOLAR TRANSISTOR MODEL The SPICE notation has been used in the model equations and in the labeling of the model components. The collector and base currents are written as: qVB’C’ Is qVB’E’ (exp ) IS [(exp ) ] 1 Ic= 1 QB NRKT NFKT βR qVB’C’ (exp qVB’C’ ) (exp ) ISC 1 1 NCKT NRKT qVB’E’ IS Is (exp qVB’C’ 1) (exp 1) IB= + ISE + βR NRKT βF NFKT qVB’E’ qVB’C’ (exp 1) (exp 1) + ISC NEKT NCKT

The SPICE base resistance model includes current crowding, and is given by: RB RBM = RBB’ RBM + QB The emitter/base depletion capacitance CJEB is modeled using: VB’E’ MJE = [1 ] CJEB CJE VJE The emitter diffusion capacitance CDE is modeled by: ə [ TFFIS qVB’E’ = (exp ) ] CDE 1 ə VB’E’ QB NFKT A total base/collector capacitance CBC is given by: MJC VB’C’ qVB’C’ [1 ] [ qIS ] CBC = CJC + TR exp VJC NRKT KT

Chapter 4 POLYSILICON EMITTERS 4.1 INTRODUCTION Use: form the gate electrode of the MOS transistor Reason: low deposition temperature and its ability to withstand the high temperatures

Fabrication sequence for a polysilicon emitter

Fabrication sequence for a polysilicon contacted emitter

The advantages of polysilicon emitters: Firstly: their suitability for producing shallow emitter/base junctions and also their compatibility with self-aligned fabrication techniques Secondly: they allow the parasitic resistances and capacitances of a bipolar transistor to be minimized, with the result that a considerable improvement in circuit performance is obtained Furthermore: significantly higher values of common emitter current gains are obtained

The advantages of the improved gain of the polysilicon emitter transistor First: the additional gain can be traded for an increase in the base doping concentration and hence a decrease in the base resistance. This is likely to lead directly to an improvement in the switching speeding of the bipolar transistor. In addition: reducing the emitter/base junction depth of a conventional bipolar transistor leads to an equivalent reduction in the current gain. This is in contrast to the situation for a polysilicon emitter, where the emitter/base junction depth can be reduced without any degradation of the current gain.

4.2 BASIC PHYSICS OF THE POLYSILICON EMITTER Problems: difficult to characterize and difficult to model the polysilicon/silicon interface and the polysilicon grain boundaries Conclusion from the comparison of the current gain: As is shown in the following Figure, it can be seen that the improvement in gain results from a decrease in base current rather than an increase in collector current.

Gummel plots for practical polysilicon emitter transistors with and without a deliberately grown interfacial oxide

analysis： •Ipe is significantly reduced because of the mechanism identified as tunneling. Hence the base current is therefore determined by the tunneling properties of the interfacial oxide, in particular by the interfacial layer thickness and the effective barrier height for holes χh。 In devices with a nominally clean interface are improved gains are again obtained, although in this case the improvement is only by a factor of 2 or 3.These results can be explained by noting that in a polysilicon emitter transistor the effective emitter/base junction depth is given by the sum of the polysilicon and single-crystal emitter thickness. The physics of polysilicon emitters is further complicated by the presence of the grain boundaries in the polysilicon and also by the large pseudo-grain boundary which is formed at the interface between the polysilicon and single-crystal silicon. The influence of grain boundaries on the electrical characteristics of polysilicon emitter transistors has been experimentally demonstrated and arsenic segregation identified as being important.

Summary •Both tunneling and transport mechanisms contribute to the improved gains of polysilicon emitter transistors. •Tunneling offers by far the biggest gain improvement, but it can result in an undesirable increase in the emitter resistance of transistor. •The transport mechanism offers much lower gain improvements, but the benefit can be maximized if careful attention is paid to the mechanisms which limit the extent of the gain improvement.