1. INTRODUCTION: MD. SHAFIQUL ISLAM ROLL:1116047 REGI:000002880

2. Topics Introduction History of FinFET. FinFET structure.
Feature of FinFET.
Why FinFET??????
General Layout and Mode of operation.
Discussion of Fin.
Effect on Fin Width and Height
Recent FinFET Development
Advantages and Disadvantages.
Applications of FinFET Technology
Conclusion

3. INTRODUCTION TO FINFET
The term “FINFET” describes a non-planar, double gate transistor built on an SOI substrate, based on the single gate transistor design.
The important characteristics of FINFET is that the conducting channel is wrapped by a thin Si “fin”, which forms the body of the device.
The thickness of the fin determines the effective channel length of the device.

4. History of FinFET
FINFET is a transistor design first developed by Chenming Hu and his colleagues at the University of California at Berkeley, which tries to overcome the worst types of SCE(Short Channel Effect).
Originally, FINFET was developed for use on Silicon-On-Insulator(SOI).
SOI FINFET with thick oxide on top of fin are called “Double-Gate” and those with thin oxide on top as well as on sides are called “Triple-Gate” FINFETs

5. FinFET Structure

6. FEATURES OF FINFET
Lower leakage currents caused by a fully depleted channel region
Reduced short-channel effects
More transistors/unit area due to 3D layout
Less variation effects from dopand fluctuation
Lower Line Edge Roughness (LER) variation
Improved performance margins
Lower retention voltage in SRAMs

7. REASON FOR EVOLUTION OF FINFET
For the double gate SOI MOSFETs, the gates control the energy barrier b/w source and drain effectively.
Therefore, the Short Channel Effect(SCE) can be suppressed without increasing the channel impurity concentration.
Use a finlike structure instead of the conventional flat design, possibly enabling engineers to create faster and more compact circuits and computer chips . The fins are made not of silicon, but from a material called indium-gallium-arsenide, as shown in this illustration.

8. GENERAL LAYOUT & MODE OF GENERAL LAYOUT & MODE OF OPERATIONTION
The basic electrical layout and mode of operation of a FINFET does not differ from a traditional FET.
There is one source and one drain contact as well as a gate to control the current flow.
In contrast to planar MOSFET, the channel b/w source and drain is build as 3D bar on top of the Si substrate and are called fin

9. The gate electrode is then wrapped around the channel, so that there can be formed several gate electrodes on each side which leads to the reduction in the leakage currents and an enhanced drive current.

10. EFFECT ON FIN WIDTH AND HEIGHT
Threshold voltage reduces with increased fin thickness. At short channel lengths, the surface potential depends not only on capacitive coupling between the gate and channel region but also on the capacitance of source / fin and drain/fin junction. As the fin thickness increases the width of the source/fin and drain /fin depletion region increases, which decreases the source / fin and drain/fin junction capacitance, as a results gate to surface potential coupling increases and hence the threshold voltage decrease with increase the fin thickness
Fin thickness plays a very important role while deciding SCEs. DIBL increases with increase fin thickness. Drain electric field lowers the barrier of channel in case of thick silicon film device because of reduced source / fin and drain/fin junction capacitance. Sub-threshold swing also increase with fin thickness. The reason behind this is the gat control over channel region degrades with increased channel volume at constant drain and source proximity.

11. Recent FinFET Development & Fabrication Mechanism

12. ADVANTAGES Higher technological maturity than planar DG.
Suppressed Short Channel Effect(SCE)
Better in driving current
More compact
Low cost

13. DISADVANTAGES Reduced mobility for electrons
Higher source and drain resistances
Poor reliability

14. APPLICATIONS
Low power design in digital circuit, such as RAM, because of its low off-state current.
Power amplifier or other application in analog area which requires good linearity.

15. CONCLUSION
To summarize, in FinFET due to dual gate structure it has better controlling over several short channel effect such as VT roll off, DIBL, subthreshold swing, gate direct tunnelling leakage and hot carrier effects compare to the planner MOSFET FinFET has higher integration density compare to the planner MOSFET. Also fabrication of the FinFET is easiest compare to the other two type of DG MOSFET. So particularly in nanometre regime the FinFET gives better performance compare to the planner MOSFET.