ECAL SLAB Interconnect by FFC: Intro

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Presentation transcript:

ECAL SLAB Interconnect by FFC: Intro The use of a short FFC (Flat Flexible Cable) to make the interconnections between the Slab component PCBs looks a promising way ahead. The following slides discuss: The general interconnect problem The way in which FFCs could be used The initial design work The investigations and assessment work needed A programme for the work Some initial costing DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect DAQ Architecture - Overall view ~150 VFE ASICs on each side of SLAB LDA SLAB DIF ODR LDA SLAB DIF SLAB DIF LDA SLAB DIF SLAB DIF LDA SLAB DIF DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect DIF – ASU – ASU -,,,- Terminator 6 or 7 ASUs on each side of a SLAB DIF ASU[0] ASU[6] Term Termination of LVDS lines & loop back R/O Token 7 or 8 interconnections - each of many ways ?? Integrate on all ASUs as option DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect Interconnections 6 or 7 ASUs on each side of a SLAB DIF ASU[0] ASU[6] Term 7 or 8 interconnections - each of many ways 34 plus power at the last count DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect 6 or 7 ASUs on each side of a SLAB DIF ASU[0] ASU[6] Term - But each extra row needs >= 8 extra signals !! 7 or 8 interconnections - each of many ways Multiple rows make sense 34 plus power at the last count DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect – Why Multi-Rows? Silicon Wafer options: 6x6 cm wafers 6x9 cm wafers or DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect – Why Multi-Rows? Where the VFEs go: 3 row solution 6x6 cm wafers 6x9 cm wafers VFEs in middle row each serve 2 wafers - is this good?? DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect – Why Multi-Rows? Where the VFEs go: 6 row solution 6x6 cm wafers 6x9 cm wafers This avoids any VFE-sharing problem DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect – Why Multi-Rows? How to read them out – single trace 3 rows of VFEs 6 rows of VFEs Per ASU: L ~ 850mm, C ~ 85pF Per ASU: L ~ 900mm, C ~ 90pF Per Slab of 7 ASUs: L ~ 6m, C ~ 600pF Per Slab of 7 ASUs: L ~ 6.3m, C ~ 630pF Do these look BIG ?? - we’ll look at that later DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect – Why Multi-Rows? How to read them out – multiple trace 3 rows of VFEs, 3 traces 6 rows of VFEs, 6 traces Per ASU: L = 240mm, C ~ 24pF Per ASU: L = 240mm, C ~ 24pF Per Slab of 7 ASUs: Per trace: L ~ 1.7m, C ~ 170pF Per Slab of 7 ASUs: Per trace: L ~ 1.7m, C ~ 170pF How much difference will this make? DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect – Why Multi-Rows? How much difference will this make? Multi Row is aesthetically much more pleasing  - but what material advantages does it offer? Clock and Control Lines: LVDS, controlled impedance length of each C&C trace reduced below 1/NROWS: less signal degradation far cleaner routing – no need for stubs Read-Out Lines: low voltage swing CMOS data load is shared between the rows, so lower rate needed length (and hence capacitance) of each R-O trace reduced below 1/NROWS power for R/O reduced in same ratio DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect – Why Multi-Rows? How much difference will this make? Read-Out Rates and Power # Rows R-O Rate/Row R-O Power/Row R-O Power Total Trace Length (Mb/s) (mW) (mW) (m) 1 5.4 4.0 4.0 6.0 2 2.7 1.3 2.6 3.8 3 1.8 0.4 1.1 1.7 6 0.9 0.2 1.1 1.7 The power savings may not be important compared to the power budget of a complete Slab But achieving data rates of several Mbits/sec over complex traces of several metres length will be difficult DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect The existing plan is to use conductive adhesive to make these interconnections. … but: power pads need to be large – say 3 pads of 1cm width only 3 signal pads per cm gives 45 pads for signals – this is barely enough for a 2 row scheme – and there are good reasons to favour a 3 or even 6 row solution will large pads upset signal transmission properties? will the connections deteriorate with time? will the mechanical joint be good enough? if the joint is not to be mechanical, is the rigidity a problem? the lap joint with clean pads on the step will make PCB more expensive (unless already needed on ASU) re-work will be difficult DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect We have been looking at alternative forms of interconnect. The most interesting is the use of a Kapton-backed Flat Flexible Cable (FFC) The FFC would be soldered onto pads on the ASU (/DIF/Term) PCB If the overall thickness of the ASU were reduced by ~50um, connections could be on the top of the PCB – avoiding the difficult step on the edge. DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect – using FFCs DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect – using FFCs DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect – FFC Detail Optional Pre-form to reduce inter-ASU forces Alignment notches DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect – FFC Section Optional Pre-form DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect: + Mechanical connect FFC ASU ASU Glue Good mechanical joint … but hard to rework DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect – PCB Footprint DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect – FFC advantages Provides copious connections (3 x 36 easily fit) plenty for Power Planes would allow multi-row VFE organisation (3 or 6) Solder joints well proven Signal transmission likely to be less compromised Rework possible Mechanical junction would be independent: could still use glued lap joint, but non-conductive adhesives stronger and more reliable. Also the machining of the step in the PCB is far simpler as there are no pads to damage. DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect – FFC issues How to solder: Hot-Bar Soldering (Thermode) is usual technique Laser Soldering IR soldering Force needed: Hot-Bar soldering typically uses ~50N (10 lbf) force a major issue when Si wafers on ASUs vacuum chuck is a possible solution DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect: Assembly Sequence Attach FFCs on input edge of ASUs (leave other edge footprints empty) Build ASU, testing with temporary connections to FFCs (ZIF connector or using custom jig) Assemble Slab from ASUs, Terminator and DIF, soldering free ends of FFCs to neighbouring PCB Alternatively (and now preferred): Build ASU, testing with temporary connections to FFCs using custom jig Assemble Slab from ASUs, Terminator and DIF, adding FFCs to join neighbouring PCBs Much more difficult once wafers added!! DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB: FFC Programme Phase 1 Sample FFC tests using FFC-Test PCB Have samples from Axon Cables PCB design started Get custom FFC Hot-Bar soldering trials: Oxford have machine we an use for trials Unitek-Miyachi (Derby) will do half day of tests f.o.c., would then charge £650/day – preferred route? Custom Thermode tool: £650 Laser Soldering: Group at Univ. of Hull working on this – in contact equipment likely to be expensive IR: may turn out simplest – but unproven!! Kapton pretty transparent at IR Cambridge HEP have IR rework station that may be adequate for this stage. Upgrade planned. DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB: FFC Programme Phase 2 Phase 2 would aim to refine and equip for EUDET Prototype Assembly: Re-iterate FFC design Close collaboration with mechanical design and SLAB production Establish what equipment/ service provider Handling techniques and production jigs Considerable tooling effort, e.g. vacuum chuck for Hot-Bar work Rework techniques: IR rework station ? Pad levelling Rework of any mechanical joints Connnection Jig design and production for ASU testing DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB: FFC Programme Phase 1 Costs Cost of FFC Programme Phase 1 FFC-Test PCB: £600 Custom FFC run: £350 - £550 for ~200 pieces Hot-Bar soldering trials at Unitek (including custom Thermode tool): allow £1700 Laser Soldering: no indication as yet as to whether Hull would charge to carry out investigation. IR: no major costs foreseen – a bit for tooling ? DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge

ECAL SLAB Interconnect: FFC Conclusions There are major advantages in using FFCs: Removes major bottleneck in number of connections Promises greater reliability Rework likely to be easier There are issues that need to be tackled: Bonding force is the most serious IR or Laser Soldering will minimise this Vacuum chuck (or other) offer a solution Phase 1 project looks promising: Cost less than £3000 (within WP2.2 ??) Good candidate companies and contacts DIF-ASU-ASU_Interconnect.ppt Maurice Goodrick & Bart Hommels , University of Cambridge