Highlights of Atlas Upgrade Week, March 2011

Planar pixel present n-in-n submission

3D sensors

3D sensors

Next CiS n-in-p production: thin pixels A second production of n-in-p pixels at CiS is in preparation, this time focusing on FE-I4 compatible sensors PPS groups participating in the project: CERN, Dortmund-TU, IFAE, LPNHE, MPP, Orsay 3 batches of different thickness on 4” wafers: 300 mm for reference 200 mm 150 mm p-type FZ wafers with 300 mm thickness, 10KW cm resistivity have been purchased at Topsil. Thinning and polishing procedures are under test at Rockwood (near Marseille) using an old batch of n-type wafers. 2x1 FE-I4 FE-I4 Preliminary

Sensor thinning technology at MPP-HLL For the n-in-p wafers the process completed up to step #4. The handle wafer will be used as a support also during the ASIC interconnection phase. Production characteristics: 8 n-in-p 6“ wafers. Different active thicknesses: 75μm and 150μm. Complete electrical characterization of pixel devices before and after irradiation – CCE on strips

EMFT SLID Process FE-I3 Cu3Sn Cu6Sn5 27 mm Sensor Alternative to bump bonding (less process steps “lower cost” (EMFT)). Small pitch possible (~ 20 mm, depending on pick & place precision). Stacking possible (next bonding process does not affect previous bond). Wafer to wafer and chip to wafer possible. However: no rework possible.

Charge Collection Efficiency with thin sensors CCE measurements on irradiated n-in-p strips, from the same SOI production are performed with the ALIBAVA system (Beetle chip). 75 mm The strip sensors used in these measurements have the same structure as the pixels (punch-through biasing, DC coupling) with the exception of the length (~ 7 mm)

Pixels at HPK in 6-in. wafer Pixel sensors 2x1 FE-I4 1x1 FE-I4 FE-I3 layout (Mainly) FE-I4 layout Two wafer layouts have been fabricated in 6-in. wafers Y. Unno, AUW Oxford, 2011/3/28

N-in-p 150 µm Thin Pixel Sensors n-in-p 150 µm thinned 2x1 FE-I4 type 1 µA 1x1 FE-I4 type Thinning is made as Finishing 320 µm wafer process first Thinning the wafers Completing the backside Good I-V performance, although before dicing Making of FE-I4 1x1 pixel modules with thin pixel sensors Number of wafers are at IZM for bump-bonding Available in Mid April (?) 1000 V Y. Unno, AUW Oxford, 2011/3/28

Pixels at UK/Micron G. Casse et al. Results with irradiated FE-I3 assemblies of n-in-p Micron detectors Thickness: 300 µm 7 and 15 x 1015 p (24 GeV/c) cm-2 3.2 and 6.8x1015 1-MeV n-eq/cm2 CCE with analogue readout Alibava system 40MHz clock New IV results of recent Micron production n-in-p, 300 µm, 150 µm Latest production n-in-p, p-in-n, n-in-n Y. Unno, AUW Oxford, 2011/3/28

New Micron wafers (150 and 300 µm thick). G. Casse et al. New Micron wafers (150 and 300 µm thick). Reverse current of Micron n-in-p sensors (two size of sensors). Wafers to be processed by IZM. N-in-p 150mm, VFD ~ 40v N-in-p 300mm, VFD ~ 80v Y. Unno, AUW Oxford, 2011/3/28

Slim edge Many new players VTT UCSC Hamamatsu

Slim edge with alumina (UCSC)