Computer Organization

Slides:



Advertisements
Similar presentations
Sequential Logic Circuits. Set-Reset Latch The Set-Reset latch or bistable is a simple sequential logic circuit that remembers what has happened to the.
Advertisements

Tutorial 2 Sequential Logic. Registers A register is basically a D Flip-Flop A D Flip Flop has 3 basic ports. D, Q, and Clock.
Give qualifications of instructors: DAP
A. Abhari CPS2131 Sequential Circuits Most digital systems like digital watches, digital phones, digital computers, digital traffic light controllers and.
CS 151 Digital Systems Design Lecture 19 Sequential Circuits: Latches.
Digital Logic Chapter 5 Presented by Prof Tim Johnson
Sequential Circuits1 DIGITAL LOGIC DESIGN by Dr. Fenghui Yao Tennessee State University Department of Computer Science Nashville, TN.
Sequential circuits The digital circuits considered thus far have been combinational, where the outputs are entirely dependent on the current inputs. Although.
Module 12.  In Module 9, 10, 11, you have been introduced to examples of combinational logic circuits whereby the outputs are entirely dependent on the.
Computing Machinery Chapter 5: Sequential Circuits.
Digital Logic Design Brief introduction to Sequential Circuits and Latches.
EECC341 - Shaaban #1 Lec # 13 Winter Sequential Logic Circuits Unlike combinational logic circuits, the output of sequential logic circuits.
So far, all of the logic circuits we have studied were basically based on the analysis and design of combinational digital circuits. The other major aspect.
Digital Computer Design Fundamental
COE 202: Digital Logic Design Sequential Circuits Part 1
Rabie A. Ramadan Lecture 3
ECA1212 Introduction to Electrical & Electronics Engineering Chapter 9: Digital Electronics – Sequential Logic by Muhazam Mustapha, November 2011.
Computer Organization & Programming Chapter 5 Synchronous Components.
Synchronous Sequential Logic A digital system has combinational logic as well as sequential logic. The latter includes storage elements. feedback path.
Sahar Mosleh PageCalifornia State University San Marcos 1 More on Flip Flop State Table and State Diagram.
Chapter5: Synchronous Sequential Logic – Part 1
4–1. BSCS 5 th Semester Introduction Logic diagram: a graphical representation of a circuit –Each type of gate is represented by a specific graphical.
Digital Design - Sequential Logic Design
Sequential Circuits.
Lecture 4. Sequential Logic #1
Computer Architecture & Operations I
Dr. Clincy Professor of CS
Sequential Circuits.
FLIP FLOPS Binary unit capable of storing one bit – 0 or 1
LATCHED, FLIP-FLOPS,AND TIMERS
Clocks A clock is a free-running signal with a cycle time.
EKT 221 : Digital 2 COUNTERS.
FIGURE 5.1 Block diagram of sequential circuit
Sequential Circuit: Counter
Flip-Flop.
Sequential Circuits Most digital systems like digital watches, digital phones, digital computers, digital traffic light controllers and so on require.
Sequential Logic and Flip Flops
Flip Flop.
ECE Digital logic Lecture 16: Synchronous Sequential Logic
Sequential logic circuits
Sequential Circuits: Latches
Satish Pradhan Dnyanasadhana college, Thane
Sequential Logic and Flip Flops
Boolean Algebra and Digital Logic
Sequential Circuits: Latches
Elec 2607 Digital Switching Circuits
触发器 Flip-Flops 刘鹏 浙江大学信息与电子工程学院 March 27, 2018
Instructor: Alexander Stoytchev
Sequential circuit design
Synchronous Sequential Circuits
Instructor: Alexander Stoytchev
Dr. Clincy Professor of CS
Sequential circuit design
Instructor: Alexander Stoytchev
Dr. Clincy Professor of CS
Instructor: Alexander Stoytchev
Sequential Circuits: Latches
Sequential circuit analysis: kale
University of Maryland Baltimore County Department of Computer Science and Electrical Engineering   CMPE 212 Laboratory (Discussion 10) Hasib Hasan
Sequential Design Example
FLIP-FLOPS.
Flip-Flops.
Sequential circuit analysis
Lecture 14: State Tables, Diagrams, Latches, and Flip Flop
Sequential Circuit Analysis
Registers and Counters
Chapter 5 Sequential Circuits.
EGR 2131 Unit 12 Synchronous Sequential Circuits
Sequential Digital Circuits
Week 11 Flip flop & Latches.
Presentation transcript:

Computer Organization CSC 405 Sequential Circuit Design

Sequential Circuit A sequential logic circuit is one whose outputs depend not only on its current inputs, but also on the past sequence of inputs, possibly arbitrarily far back in time. The next output pattern to be presented can be defined in terms of the current input and the current state (internal gate values) of the circuit. Current State sequential circuit input output clock If the sequential circuit is to be synchronized with other circuitry, it will include a clock input to control when the output changes.

Latches and Flip-Flops Latches and flip-flops are the building blocks of sequential circuits. They use feedback to hold information (digital values) from a previous input. The S-R latch shown below is made of a pair of NOR gates. The circuit has two inputs R and S and two outputs Q and not-Q. When both inputs are zero (0) the circuit maintains whatever output pattern it has. 0 0 - - 0 1 1 0 1 0 0 1 1 1 0 0 S R Q Q’ R S Q If S (set) is switched high (1) and then back to zero (0) the Q output will go high (1). If the R (reset) input is cycled high and back to zero, the Q output will go low (0). Setting both inputs high forces both outputs low. (This pattern is not used for the latch operation.)

We can synchronize (control when the output changes) the S-R latch by adding a clock to our circuit. Q Clk S-R Latch with Enable Finally, since we want to use the latch to hold a binary value we will always be presenting opposite values to the S and R inputs. We can eliminate one of the input by presenting S’ to R using an inverter. D Latch D Q Clk D Q Q’ Clk

State Transition Diagram The first step of sequential circuit design is the development of a state transition diagram that defines the desired circuit. Lets say you wanted to build a sequential circuit that recognized (switched its output to high) when the sequence of bits 1110 was input (right to left order). 1. Since we are attempting to recognize a 4-bit string, we will need 4 states in our diagram. 2. We will label one of the states as the start state and show the transitions from one state to the next for the desired input. 1 1 start 1 As soon as we recognize the goal bit-string, we return to the start state on the last transition to get ready for the next bit.

3. We also know that our output should be 0 until we get the last (4th) bit show we show the desired output for each of these transitions using the input/output notation. 0/0 1/0 1/0 start 1/1 4. Since we may get any bit-string, we need to include transitions for both 1 and 0 inputs from each state. 1/0 0/0 1/0 1/0 start 0/0 0/0 0/0 1/1

5. Next we need to label each of the states 5. Next we need to label each of the states. These labels must be base two numbers since the flip-flop of the sequential circuit will be used to indicate which state we are in as we read bits from the input bit-string. For N states we will need log2N digits in our state labels. 1/0 0/0 1/0 1/0 start 00 01 10 11 0/0 0/0 0/0 1/1 This is the completed state transition diagram for the 1110 bit-string recognizer (right-to-left reading direction). Notice that when a (0) bit is read we always go to state (01), since the (0) is the first bit in the string we are trying to recognize. When we read a (1) from the start state (00) we stay in the start state since a (1) is not the first bit of the desired string. The only way to get a (1) output from the start state is to receive a (0) (1) (1) and (1) in that order.