Interrupts and signals Module 2.3 COP4600 – Operating Systems Richard Newman

Asynchronous events Exceptions – something the current process does Software – explicitly raise exception when problem occurs Hardware – trap when problem occurs (overflow, DBZ, etc.) Software Signal – something another process does Sent by one process to another process Restrictions on who can send a process a signal May be caught by receiving process – signal handler Hardware Interrupt – something some hardware does Device raises signal line Line checked every instruction Causes reaction by hardware – jump to interrupt vector May be ignored – protection state/interrupt mask

Interrupts and signals Hardware Interrupt - examples Clock “tick” I/O device done Peripheral needs service Software Signal - examples Hardware exception – system sends process a signal Wakeup signal from watchdog timer Alert that file contents have changed Kill signal – terminate process (can’t be caught)

Figure 2-39. Interrupt processing hardware on a 32-bit Intel PC. Interrupt hardware What if there are more than 8 devices that need to be able to signal the CPU? Chain IRQ controller using one interrupt line for slave. Meaning of interrupt numbers found in include/ibm/interrupt.h Figure 2-39. Interrupt processing hardware on a 32-bit Intel PC. Tanenbaum & Woodhull, Operating Systems: Design and Implementation, (c) 2006 Prentice-Hall, Inc. All rights reserved. 0-13-142938-8

Interrupts Revisited 5 1 7 4. IC gives IRQ number Figure 5-5. How an interrupt happens. The connections between the devices and the interrupt controller actually use interrupt lines on the bus rather than dedicated wires. Tanenbaum & Bo,Modern Operating Systems:4th ed., (c) 2013 Prentice-Hall, Inc. All rights reserved.

Interrupt handling from running process perspective Four processes involved: Process P1 that made disk access request (gets blocked) -------------------------------------- Process that is running when I/O done (INT occurs) Interrupt handler, but it is not considered a process Device driver System service (FS) Figure 1-11. (b) Interrupt processing involves taking the interrupt, running the interrupt handler, and returning to the user program. Tanenbaum & Bo, Modern Operating Systems:4th ed., (c) 2013 Prentice-Hall, Inc. All rights reserved.

Servicing Interrupts IRQ causes trap to kernel code (same for all IRQs) Looks up interrupt vector according it interrupt number Also need to change protection state – kernel mode Run interrupt service routine (ISR) Not code in current process – system code Must use CPU and its registers May also need its own stack space Save state of currently running process: Context switch Special Registers – PC, CIR, PSW, etc. General purpose registers – current data being operated on Memory and resource information – stack pointer, etc.

Interrupt: process perspective RAM Interrupt Handler Code Current Process Code Current Process is running Interrupt occurs Trap to kernel – fixed entry point Find ISR address in interrupt vector table Context switch code loads ISR Interrupt handler (ISR) executes Return – CS code loads process Process resumes execution Primary IH Service Code ASM context switch

MINIX Memory Table of addresses (vectors) of kernel code to handle interrupts, indexed by interrupt number Figure 2-31. Memory layout after MINIX 3 has been loaded from the disk into memory. The kernel, servers, and drivers are independently compiled and linked programs, listed on the left. Sizes are approximate and not to scale. Tanenbaum & Woodhull, Operating Systems: Design and Implementation, (c) 2006 Prentice-Hall, Inc. All rights reserved. 0-13-142938-8

pointing to handler code Stack needed By service routine In table of addresses indexed by interrupt # pointing to handler code Interrupt service Figure 2-5 Skeleton of what the lowest level of the operating system does when an interrupt occurs. Tanenbaum & Woodhull, Operating Systems: Design and Implementation, (c) 2006 Prentice-Hall, Inc. All rights reserved. 0-13-142938-8

Restart Figure 2-41. Restart is the common point reached after system startup, interrupts, or system calls. The most deserving process (which may be and often is a different process from the last one interrupted) runs next. Not shown in this diagram are interrupts that occur while the kernel itself is running. Tanenbaum & Woodhull, Operating Systems: Design and Implementation, (c) 2006 Prentice-Hall, Inc. All rights reserved. 0-13-142938-8

Layers of the I/O System Figure 3-8. Layers of the I/O system and the main functions of each layer. Tanenbaum & Woodhull, Operating Systems: Design and Implementation, (c) 2006 Prentice-Hall, Inc. All rights reserved. 0-13-142938-8

Device Drivers in MINIX 3 Figure 3-16. Two ways of structuring user-system communication. Tanenbaum & Woodhull, Operating Systems: Design and Implementation, (c) 2006 Prentice-Hall, Inc. All rights reserved. 0-13-142938-8

Interrupts Revisited Figure 5-5. How an interrupt happens. The connections between the devices and the interrupt controller actually use interrupt lines on the bus rather than dedicated wires. Tanenbaum & Bo,Modern Operating Systems:4th ed., (c) 2013 Prentice-Hall, Inc. All rights reserved.

Multiple interrupts What if interrupt occurs while servicing an interrupt? Usually interrupt service routines block interrupts Interrupt mask – register Protection state – may automatically mask interrupts Setting interrupt mask is protected instruction Restore interrupts Must remember old interrupt mask to restore it Check for additional interrupts when service routine done

Fetch-decode-execute cycle revisited Copy instruction from RAM into IR Increment PC Decode Interpret opcode Execute Carry out instruction – invoke ALU or move data, etc. Check status register Handle exceptions Check interrupt line If interrupts enabled Service interrupt(s)

Precise Interrupt Four properties of a precise interrupt: The PC saved in a known place. All instructions before that pointed to by PC have fully executed. No instruction beyond that pointed to by PC has been executed. Execution state of instruction pointed to by PC is known. Tanenbaum & Bos, Modern Operating Systems:4th ed., (c) 2013 Prentice-Hall, Inc. All rights reserved.

Figure 5-6. (a) A precise interrupt. (b) An imprecise interrupt. Precise vs. Imprecise Figure 5-6. (a) A precise interrupt. (b) An imprecise interrupt. Tanenbaum & Bos, Modern Operating Systems:4th ed., (c) 2013 Prentice-Hall, Inc. All rights reserved.

Interrupts vs. System Calls Figure 2-40. How a hardware interrupt is processed. How a system call is made. Tanenbaum & Woodhull, Operating Systems: Design and Implementation, (c) 2006 Prentice-Hall, Inc. All rights reserved. 0-13-142938-8

Figure 1-17. The steps in making a read system call System Calls Codes for system calls found in include/minix/callnr.h Regular procedure call stuff Trap (INT) and context switch Figure 1-17. The steps in making a read system call Tanenbaum & Bos, Modern Operating Systems:4th ed., (c) 2013 Prentice-Hall, Inc. All rights reserved.

Figure 4-40. Three phases of dealing with signals. Signal handling More on this later…. Figure 4-40. Three phases of dealing with signals. Tanenbaum & Woodhull, Operating Systems: Design and Implementation, (c) 2006 Prentice-Hall, Inc. All rights reserved. 0-13-142938-8

Figure 4-42. Signals defined by POSIX and MINIX 3. Tanenbaum & Woodhull, Operating Systems: Design and Implementation, (c) 2006 Prentice-Hall, Inc. All rights reserved. 0-13-142938-8

Figure 4-42. Signals defined by POSIX and MINIX 3. More Signals Figure 4-42. Signals defined by POSIX and MINIX 3. Tanenbaum & Woodhull, Operating Systems: Design and Implementation, (c) 2006 Prentice-Hall, Inc. All rights reserved. 0-13-142938-8

Summary Asynchronous events Needed for multiprogramming and I/O Exceptions, signals, interrupts Needed for multiprogramming and I/O Interrupt handling Context switch Interrupt vectors Fetch-Decode-Execute revised Comparison to System Calls Signal handling