Field Programmable Gate Arrays

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FPGA (Field Programmable Gate Array)

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Presentation transcript:

Field Programmable Gate Arrays Sharif University of Technology Department of Computer Engineering Field Programmable Gate Arrays Alireza Ejlali

FPGA Three elements Regularity Field Programmable Logic Blocks I/O Blocks Interconnection wires and switches Regularity Two dimensional structure Field Programmable

LUT-Based Logic Cells LUT is a memory which contains the truth-table of a function. LUT with n inputs can implement any n-bit function. Truth-table is placed in LUT during the FPGA programming. LUTs are implemented with SRAM.

LUT Implementations

MUX Implementations

PLD Programming Technologies FPGA One Time Programmable Anti-fuse Re-Programmable SRAM CPLD Fuse EPROM E2PROM

SRAM Logic Blocks (LUT) Storage (Embedded RAM) Programmable Connections (Routing) Pass transistor Transmission gates Multiplexer

Programmable Connections

SRAM controlled switches

Advantages Disadvantage SRAM Easily changeable High density Track latest SRAM technology Disadvantage Volatile High Power dissipation

Anti-fuse

Anti-fuse Less expensive than SRAM technology One time programmable