Introduction to MOS Transistors

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Presentation transcript:

Introduction to MOS Transistors

Outline Similarity Between BJT & MOS Introductory Device Physics

BJT & MOS Transistor

Regions of Operation Comparison NMOS PMOS

Regions of Operation

Introductory Device Physics

A Crude Metal Oxide Semiconductor (MOS) Device V2 causes movement of negative charges, thus current. V1 can control the resistivity of the channel. Positive charge attract negative charges to the interface between insulator and silicon. A conductive path is created If the density of electrons is sufficiently high. Q=CV. P-Type Silicon is slightly conductive. The gate draws no current!

NMOS in 3D (provide electrons) (drain electrons) W n+ diffusion allows electrons move through silicon.

Typical Dimensions of MOSFETs These diode must be reversed biased. tox is made really thin to increase C, therefore, create a strong control of Q by V.

A Closer Look at the Channel Formulation Need to tie substrate to GND to avoid current through PN diode. VTH=300mV to 500 mV (OFF) (ON) Positive charges repel the holes creating a depletion region, a region free of holes. Free electrons appear at VG=VTH.

Change Drain Voltage Resistance is determined by VG.

Change Gate Voltage A higher VG leads to a lower channel resistance, therefore a larger slope.

Length Dependence fixed VD fixed VG The resistance of a conductor is proportional to the length.

Dependence on Oxide Thickness fixed VD fixed VG Q=CV C is inversely proportional to 1/tox. Lower Q implies higher channel resistance.

Width Dependence The resistance of a conductor is inversely proportional to the cross section area. A larger device also has a larger capacitance!

Channel Pinch Off Q=CV V=VG-VOXIDE-Silicon VOXIDE-Silicon can change along the channel! Low VOXIDE-Silicon implies less Q.

VG-VD is sufficiently large to produce a channel VG-VD is NOT sufficiently large to produce a channel No channel Electrons are swept by E to drain. Drain can no longer affect the drain current!

Regions (No Dependence on VDS) No channel Assumption:

PMOS Transistors

PMOS in Cut-Off Mode - - - - - - - - - - P+ P+ N+ N P Substrate= 0V

PMOS: Formation of Channel - - - - - - - - - - ++++++++++ P+ P+ N+ N P Substrate= 0V Induced holes

PMOS in Triode Region P+ P+ N+ N P Substrate= 0V Induced holes - - - - - - - - +++++++++ P+ P+ N+ N P Substrate= 0V Induced holes

PMOS in Saturation Region - - - - - - - ++++++++ P+ P+ N+ N P Substrate= 0V Induced holes

Compare NMOS Equation to PMOS Equation (Cut-off) (triode) (saturation) Valid for NMOS (saturation) (triode) (Cut-off) Valid for PMOS