E. Hazen - DTC1 DAQ / Trigger Card for HCAL SLHC Readout E. Hazen - Boston University

E. Hazen - DTC2 HCAL DTC (aka CMS-MCH) What should it do (for HCAL, others)? Send timing/controls and buffer state from AMCs Concentrate DAQ data, send to central DAQ Optionally, manage selective readout Implementation Lives in MCH slot for connectivity Based on NAT-MCH base board Stack of 2 custom mezzanines plus connector board

E. Hazen - DTC3 HCAL DTC (aka CMS-MCH) T1 T2 T3 T4 NAT-MCH base board Standard MCH functions GbE to mezzanines SPI for flash programming I2C bus T2 gets power, GbE, SPI, I2C from NAT-MCH. 3.3V Regulators Clock fanout Spartan-3A FPGA Single-width MCH module Provides controls, clock distribution (TTC initially) Provides DAQ interface via fat pipes (external SLink/TTS adapter) Font panel I/O: 2x SFP+ optical transceiver DAQ + Spare TTCrx fiber receiver Built on NAT-MCH base board T3 logic board V6 FPGA Fabric I/O to T3, T4 Connector board TTC optical rx, CDS SFP+

E. Hazen - DTC4 Front Panel 2 x SFP(+) TTC Fiber rx GbE Port 1 GbE Port 2 Provided by NAT-MCH Provided by DTC mezzanines

E. Hazen - DTC5 Sparta n 3A FOFO FOFO FOFO FO DIV Virtex 6 Op to Rx CD R Tx: TTC Rx: TTS Fabric D (port 4/8) DAQ I/O Fabric B (port 2/3) Fabric E (port 5/9) Spare Ctrl CLK1 40.xxx LHC Clk 160MHz TTC Data 160MHz 40Mhz TTC in T3 PCB T2 PCB DTC – Emphasis on CLK/Ctrl for 2010 TB and tests GT X GbE Switch 40/80 Mhz TTC Data SFP+ (2) DAQ

E. Hazen - DTC6 First prototype PCB TTC Input JTAG CPLD (Will omit in Final design) Spartan-3A FPGA TTC decoding, MCH interface Flash memory Voltage Regulators Mounted on NAT-MCH Base board

E. Hazen - DTC7 DTC 2010 Prototype First proto T2 board tested Management functions, flash, FPGA prog all working fine TTC receiver/decoder in Spartan-3 ok  Waiting for TruLight opto-rx for final jitter tests Final layouts of T2, T3 and connector PCB almost done T2 in fab, T3 about to go out Fabricated / assembled by mid-May All parts here or expected shortly

E. Hazen - DTC8 DAQ / Controls for SLHC Phase I, II Compatibility with existing system TTC support built-in SLink64, TTS provided via adapter (details follow) Future Options Up to 6Gb fiber I/O in prototype; upgrad easy to 10Gb Invited to participate in new RUWG-like group by DAQ to define new DAQ interface for phase II Worst-case scenario is we must replace one DTC PCB for phase II -- not bad

E. Hazen - DTC9 Legacy DAQ Adapter Carrier PCB (i.e. 9U VME!) Power (only) from VME SFP+ SLink64 SFP+ SLink64 Virtex 5/6 FPGA Fiber I/O from 2 uTCA crates Crate 1: SLink (2) TTS Dual RJ-45 Crate 2: TTS SLink (2) One i.e. 9U VME module handles two uTCA crates, each with 400MBytes/sec out