1. HCAL Data Concentrator Production Status
Eric Hazen, Jim Rohlf, Shouxiang Wu
Boston University

2. DCC Engineering Status
Six prototype boards working
Successful readout of 6 HTRs (144 channels) in test beam through SLink
Simple event builder working – FPGA coding for more advanced version underway
Final hardware design changes for SLink 64 ready to start
27 Sept 2002
CMS HCAL -- J.Rohlf/E.Hazen

3. CMS HCAL -- J.Rohlf/E.Hazen
DCC Block Diagram
PC-MIP Mezzanine Cards
3 Channel Link Receivers
Data Concentrator Logic PMC
TTCRx
RJ-45 to aTTS
(Fast status)
PCI
Universe
33/32
DCC
PCI
PCI-VME
FPGA
Bridge
33/64
Data from HTR Modules
SDRAM
S-Link (64) LSC
PCI
to RUI
33/32
27 Sept 2002
CMS HCAL -- J.Rohlf/E.Hazen

4. Final (?) DCC Configuration
Double-Width VME Module
(one backplane slot) All I/O on Front Panel
DCC Logic
Mezzanine Card
3x Link
Receiver
VME
DAQ
S-LINK64
DAQ
12 HTR INPUTS
aTTS
TTC
“Front Porch”
Spare Standard
PMC Site
(33MHz 64 bit)
Spare
235 pin 2mm
Connector
27 Sept 2002
CMS HCAL -- J.Rohlf/E.Hazen

5. CMS HCAL -- J.Rohlf/E.Hazen
DCC Development Plans
Engineering Tasks for DCC logic board:
Update firmware to include synchronization and monitoring features
Readout Link modification
Currently Slink 32
66MHz Slink 64 per CERN standard
TTCrx
Currently use mezzanine board
Change to BGA package TTCRx on-board (so we can put the connector on the front panel)
Add “front porch” on PCB for S-Link, TTC, TTS connectors
27 Sept 2002
CMS HCAL -- J.Rohlf/E.Hazen

6. CMS HCAL -- J.Rohlf/E.Hazen
DCC Production Status
Motherboards (145) and LRBs (200) finished
S-Link(64) output
aTTS outputs (RJ-45)
TTCrx BGA if required
Overall Status:
Motherboard and Link Receivers produced
Full qty for 32 DCCs plus spares
Final logic board design pending final details…
27 Sept 2002
CMS HCAL -- J.Rohlf/E.Hazen

7. CMS HCAL -- J.Rohlf/E.Hazen
Proposed VME64x Rules
VME64x(P) “Rules” Compliance?
Difficult for us to comply at this late date.
All VME carrier boards have been manufactured.
However, most required features exist in our DCC design…
See:
Look for Universe II
LVDS Link Receiver
Production completed
VME 9Ux400 Motherboard
Production completed
DCC Logic Board
Final design update underway
27 Sept 2002
CMS HCAL -- J.Rohlf/E.Hazen

8. CMS HCAL -- J.Rohlf/E.Hazen
Proposed VME64x Rules
The “7 Golden Rules” per C.Schwick
Implement CR/CSR Space of VME64x
Universe II precludes this but provides own CSR layout
Implement the Serial Number
We can do this (but not at “standard” address)
…Plug and Play with “address relocation”…
Universe II supports address relocation and slot geographical addressing
Do not use dynamic function sizing…
Universe II memory footprint not known until PCI configuration is complete! However, we can use fixed maximum size.
Do not use fixed base address
Fine, we don’t
Use re-programmable media for CR
CR is hardwired in Universe II
All other VME64x features are optional…
We don’t use any (except 3.3V)
27 Sept 2002
CMS HCAL -- J.Rohlf/E.Hazen

9. CMS HCAL -- J.Rohlf/E.Hazen
Proposed VME64x Rules
HCAL DCC Implementation provides functionality similar to VME64x.
Plug-and-play is supported, but requires specific software
It is unfortunate that we cannot comply exactly with the “rules”, but our hardware is already built!
27 Sept 2002
CMS HCAL -- J.Rohlf/E.Hazen

10. CMS HCAL -- J.Rohlf/E.Hazen
HCAL HTR Data Format
Format for one channel
27 Sept 2002
CMS HCAL -- J.Rohlf/E.Hazen

11. CMS HCAL -- J.Rohlf/E.Hazen
DCC Output Format
Follows Latest RUWG Guidance
Payload format preliminary – for size estimate
27 Sept 2002
CMS HCAL -- J.Rohlf/E.Hazen

12. CMS HCAL -- J.Rohlf/E.Hazen
DCC Event Size
Estimate based on preliminary format
Can be reduced if necessary (contains diagnostic / error info for each datum)
PRELIMINARY
~2000
27 Sept 2002
CMS HCAL -- J.Rohlf/E.Hazen