Baby MIND, Large Area Trigger Counters E. Noah WA105 General Meeting 21 January 2015

MIND Fe B = 1.5 T (in the Fe) μ–μ– μ–μ– θ 30 cm10 cm 6-9 cm2-3 cm 10 cm 6-9 cm  steel=100 cm 30 cm μ–μ– Vertex detector neutrino beam MIND Detector modules 30 cm 10 cm Side MIND Downstream MIND μ–μ– 2

Fe Magnetization: Typical Approach 3

tur ns v Option 2) 2 large coils – one upper, one lower coil each coil wound around half the height of the iron plate assembly, Pros: field lines are “in principle” very uniform over a wide surface area, Cons: coil assembly is large and difficult to manipulate. Integration of detector modules is challenging. Option 1): Baseline Each “half-plate” has its own coil Pros: Straightforward assembly of detector planes, Cons: Need technical solution to wind coils. Baseline option enables magnetization of any number of steel plates! Baby MIND magnet coil layout 4

Modular approach s1s2s3s4s5s6-9s10-13s14-17s18-21 m1m2m3m4m5m6m7m8m9m10 s22-25 m11 s26-29 m12 s30 m13 s31 m14 s32 m15m m Example configuration: 8 iron planes are magnetised, 16 detector modules required 5

B-field Material: Armco  B ~ 1.5 T  (H = 700 A.turns/m) Simulation:  I*N = 2500 A.turns  L sol = 2 m  H eff = 1250 A.turns/m 6

Extruded scintillator slabs produced at Uniplast company, Vladimir, Russia: polystyrene-based, 1.5 % paraterphenyl (PTP) and 0.01 % POPOP; Slabs are etched with a chemical agent (Uniplast) to create a  m layer that acts as a diffusive reflector; Various sizes are possible. Acceptable light yield up to 16 m (double-ended readout). Large area counters (Y. Kudenko: INR) 7 7 mm thick, 3 cm width

Tested/compared: – Different slab sizes – Silicon photomultipliers – Wavelength shifting fibers – Optical glues Custom optical connector. Prototype modules: – 9000 bars – 50 modules Prototype scintillator modules 8

Carbon fiber envelope Aluminium electronics tray Aluminium frame Electronics Scintillator bars Prototype module mechanics 9

10 Prototype electronics  FEB characteristics : 96 SiPM channels (mini coax. connectors), 84 used for AIDA 3 CITIROC ASICs (32 ch charge ampl., trigs, ext. common HV + independent 0/4V) 12-bits 8-ch ADC 40Ms/s/ch 2 x 6Gb/s transceiver (800Mb/s for AIDA) USB3.0 (5Gb/s) µC for lab, calib. & maintenance LV & HV power supplies Altera ARIA 5 FPGA (mid-range), firmware : 84 ch. Timing meas (2/2.5ns resolution) Charge meas. (from 12-bits ADC) Baseline computation (filtering) USB3.0 gateway Gigabit protocol for readout (exp.) PCB (production launch in few days) : 8 layers 120µm space/width lines Impedance & length control (TDC) Trials with EASIROC/CITIROC eval. board

WA105 MIND: – Integration into LAr simulation software environment – Cost estimate Counters for 6x6x6m 3 LAr: – Conceptual design to define coverage, timing requirements, study mechanical integration... Prototyping with 3x1x1m 3 LAr: – To be studied, whether prototype modules under construction can be installed above 3x1x1m MIND/Counters Outlook for WA105 LAr 6x6x6m 3 Beam Trigger counters cosmic  horizontal beamline background      Beamline background MIND  p & charge ID hadronic showers tail catching (escaping neutral hadrons)  Cosmics