Testability of Integrated Circuits Presented by Srujana Aramalla Instructor: Dr.Roman Stemprok.

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Presentation transcript:

Testability of Integrated Circuits Presented by Srujana Aramalla Instructor: Dr.Roman Stemprok

Testing Expressed by checking if the outputs of a functional system correspond to the inputs applied to it.

Design for Testability (DFT) Ability of simplifying the test of any system

Goals of DFT Minimizing the cost of system production Minimizing system test complexity Improving quality Avoiding problems of timing discordance

Terminology

Practical DFT guidelines 1.Improve controllability and observability

2. Use multiplexers

3. Partition large circuits

4. Divide long counter chains

5. Initialize sequential logic

6. Avoid clock gating

7. Strictly distinguish between signal and clock

8. Separate analog and digital circuits

References