Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg MEI Technologies Incorporated NASA/GSFC Radiation Effects.

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg MEI Technologies Incorporated NASA/GSFC Radiation Effects and Analysis Group Sponsors: NASA Electronic Parts and Packaging (NEPP) Program and Defense Threat Reduction Agency under IACRO# 06-4012I

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Outline Reliability Overview Devices and Reliability Field Programmable Gate Array (FPGA) definition and background Reliability: Concerns in Space Flight Targeted FPGAs FPGA Design Considerations for Reliable Circuitry Reliability within the design cycle Summary

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop RELIABILITY

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Reliability … A Definition Reliability: R(t) Text book definition: Conditional probability that system can survive interval [0,t] General Mil-Aero Definition: Maximum number of failures that the system can tolerate and still function “correctly” Used to describe systems that are: Critical and have time intervals of no allowable disruption Impossible or extremely difficult to service Can only endure a given number or type of error crucial and generally require redundancy or restrictions due to power, thermal, or mechanical stress

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Reliability and Digital Circuitry Degradation/Electro-migration Drift (can effect skew) Leakage current Wear-out Process Variation Power performance (fluctuations or spikes) Temperature, Voltage, and thermal acceleration factors Radiation Induced Latch-up Total Dose Micro Dose Single Event Effects (SEEs) and Multiple Event Effects (MEEs) Functional Bugs

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Reliability and Digital Circuitry: New Horizons – Pluto and Beyond “When traveling such a long distance, reliability is not just dependent on parts quality, but on a robust design. On New Horizons, the Ralph instrument design needed to be not just robust, but highly capable to meet the needs of the science community, and low power to meet the mission constraints. Unfortunately, design robustness, capability, and low power are competing concepts requiring tradeoffs to be made.” - Quote from New Horizons’ Ralph System Engineer : South West Research Institute (SWRI)

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Availability Availability A(t) ~ Probability that the system is operational at the instant of time t. Lim (A(t)) t->∞ t->∞ If limit exists as t → ∞: A(t) is the expected fraction of time that system can perform useful/proper functionality Figure of Merit to describe: Amount of System downtime Delayed performance Glitches in accurate operation

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Availability - Possible Inoperable moments: (SEEs)/Multiple Event Effects (MEEs) affecting circuitry Servicing of Degraded devices Preventative Maintenance Power Cycling Fixing Functional problems Reconfiguration (FPGA) Focused Ion Beam (terrestrial designs) Software updates

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Given complete unambiguous system level specifications: GOAL: Meet our functional requirements for all ( essential ) time periods Develop Procedures for all possible erroneous events Finish the design within schedule Obtain Accurate Predictive Cost Management at all project levels Reliability and Project Goals

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Meeting Our Goals: Project Level Clearly define Project levels of Abstraction and responsibilities Define and Create a realistic process flow with checks and balances Documentation Design Reviews Version Control Design and Verification Methodologies Budget accurately for Design, Verification, Reliability determination, and overhead.

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Meeting Our Goals: Project Level Validate requirements Are they realistic? Time Schedule Design feasibility (Area, Power, functionality) Are they unambiguous? Quality of Coverage Concerning Normal functionality Concerning Error Response Procedures

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Meeting our Goals: Design Level Keep design as simple as possible at all levels Device selection Tool set selection Function implementation Perform trade analysis for necessary redundancy Follow strict design rules (i.e. Synchronous Design) Experienced designers and system architects are a must Document and Validate Goal Accomplishment: Simulations Real-time Verification – System and board Level Tests Design Reviews Version control

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Devices and Reliability

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Choosing a Device that Will Meet Flight Program Requirements Different Devices have different Reliability Issues Specifications must observe target environment TemperatureVoltageRadiation Length of Flight Device’s ability to meet project requirements Can we meet project time cycle Redundancy: is it feasible regarding device and requirements Team Experience and Knowledge Base for Target Device Development is a must “It Takes a village …”

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Field Programmable Gate Arrays (FPGA)

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop What’s the Issue? FPGA

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Role of FPGA/ASIC Devices within Space Missions Increasing Speed and Density of FPGA Devices… System On a Chip! (SOC) Subsystem: multiple boxes and boards Complex Implementation Subsystem: 1 box and multiple boards Less Complex Implementation FPGA Subsystem: 1 box 1 board Simplest Implementation Other Components Color KEY:

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop General FPGA Architecture Programmable Connectors

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Configuration: The Key Difference FPGAs contain groups of preexisting logic Configuration: Arrangement of preexisting logic Configuration defines: Functionality and Connectivity Common types One time configurable Re-configurable CONFIGURATION TYPES HARDHARD

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Traditional ASIC VS. FPGA: It’s All Hardware! Cost ASIC : Custom Mask – EXPENSIVE FPGA: Use of available logic – not Expensive Configuration: ASIC: Hard – not Reconfigurable FPGA: Hard (anti-fuse) or Soft (Reconfigurable) – Vendor dependent Available Logic Library ASIC: Small granularity … AND, OR, DFF FPGA: Larger Granularity … Vendor dependent … MUX, Super blocks

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop ASIC VS. FPGA: Designer Perspective Front-end tools are generally the same or similar: HDL, Simulation, Synthesis Back-end tools are not the same ASIC: Place & Route, Final Timing Analysis, Clock Balancing usually done out-of-house FPGA: Place & Route, Final Timing Analysis, Clock Balancing generally performed by designer Timing Analysis (FPGAs are inherently slower) FPGA: Beware of Clock Trees with hefty skew Mapping – design mapping is more complex for FPGA targets

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Reliability Concerns in Space Flight Targeted FPGAs

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Single Event Upsets (SEUs) and Single Event Transients (SETs) Transient Research: GenerationPropagationCapture Process dependent Synchronous Design High clock speed Increase probability of capture Newer Technology may be more susceptible to metastability Longer dissipation period

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Example 1: Xilinx and the Complexity of a Configuration Logic Block (CLB) Function Generator Flip Flop

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Example 1: Susceptibility in a Xilinx 4-Input Look Up Table (LUT) Configuration SRAM bits (SR)… 16 per LUT LUT INPUTS SR

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Example 1: SEE’s & Xilinx…Its Not Just Configuration Memory and Its Not Just Logic

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Example 1: SEE’s & Xilinx… Summary Configuration Memory hit: Largest area of concern for the Device The entire FPGA can become un-configured. Logic/Connector Hit Frequency dependency: SETs can be caught by Flip-Flops Frequency independent: SEU can occur in Flip-Flop Single Event Functional Interrupt (SEFI): Hits to Power On Reset Configuration Control logic Complex!!!!! What considerations must be taken to create a reliable design?

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Xilinx Example : Most Commonly Proposed Solution - Redundancy Triple the design within the Xilinx FPGA device (including I/O) … TMR or XTMR Use an anti-fuse FPGA device to scrub the configuration memory Use Redundant memory to store the scrubbing configuration information XILINX Antifuse Device Redundant Memory Power Area Thermal Reliability of Extra Devices & Interfaces Very Complicated to Verify!!!! Aeroflex Project

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Alternatives?????? Why Xilinx? – great device with great flexibility ReconfigurableSpeed Many gates available Great selection of ready made IP cores Ongoing Research for general alternative Xilinx mitigation scheme … Not an easy problem Find alternative to Xilinx when: Design does not meet specified SEE criticality Design is unable to meet verification coverage guidelines (due to mitigation requirements)

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Antifuse FPGA Devices Hard Configuration Contain Hardened Flip Flops at every DFF cell Aeroflex: DICE mitigation Actel: TMR mitigation Mitigation does not need to be verified (already in silicon – not a design choice) Mitigation is transparent to design – Ease on design cycle!!!!!!!!!!

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Actel Logic Blocks: Sequential and Combinatorial RCELL (Sequential): Triple Mode Redundant (TMR) Inputs are shared (single points of failure) contains additional combinatorial logic (not shown) CCELL (Combinatorial): Logic Block ≈ MUX Several sources of frequency dependent errors RCELL in un-hardened Actel devices RCELL in hardened Actel devices

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Multiple Event Effects (MEEs) One particle hitting several transistors Greatly overlooked Most mitigation strategies only address SEEs TMRDICE General EDAC Schemes Xilinx ICAP scrubber As technology scales down, MEE is observable and is highly probable (proximity of transistors) Using common mitigation techniques may not increase reliability to an acceptable level MEE mitigation strategies need more research and development

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Getting Back to Basics … and Hopefully Keeping it Simple!!!!!

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Aerospace vs. Commercial Industry – Design Methodology The commercial world →large community Solved many problems many years ago Single Integrity Metastability Developed Design Rules Synchronous Design Techniques Establishment of Description languages Design for Test Design for Verification Aerospace → small community trying to reinvent the wheel. What happened to “Lessons Learned”?????!!!!!!

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Key to success: Accomplish Your Goal with the Simplest Implementation!!!!!!!!!!!! Avoid unwarranted increases in Complexity: Poor choice of device …Too many components necessary Device is too small Device needs complicated redundancy scheme Adding too much redundancy in the wrong place May not be increasing reliability May be decreasing reliability Design Inexperience can lead to the unnecessary production of many more gates Most important: Avoid implementations that are too complex to fully verify!

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Space Design: Simple to Extremely Complex in a Very Short Time Are we ready???? Have we mastered <4000 DFF designs yet? Discrete state space is ≈ 2 #DFFs Add XTMR to Xilinx Only have less than 1/3 of logic I/O speed may be jeopardized (Simultaneously Switching Signals) Clock Speeds * Contains Mitigation # FLIP FLOPS ACT2 <10 MHz NO <400 to 1000 RTXSX < 50 MHz Yes <2000 to 4000 RTAXS <200 MHz Yes<21,000 XILINX V4 – LX25 < 400 MHz NO<22,000 XILINX V4 – FX60 < 400 MHz NO<52,000 * Not datasheet clock speeds … actual design clock speeds

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Reconfiguration is the Trade-off Point Given a specification such as Minimal SEU propagation… a Part with no internal mitigation can be: Overly complex and therefore difficult to verify High Power Still not meet the SEU specification guideline However, a reconfigurable part with no internal mitigation can also be: Cheaper to implement (overall) Easier to correct if a bug is found (… but…maybe harder to the find bugs)

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Another ???Benefit??? to Reconfigurable Parts: Most Reconfigurable parts come with complex IP cores Great for project design cycle (if IP cores have been thoroughly verified and correctly utilized) Skill replacement Caveat… Locks you into vendor (can not map into another vendor device) Hard to add mitigation – can not get into core IP usually designed for terrestrial use IP may not follow strict design rules set by company

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Don’t Get Carried Away with IP Availability Example: Designing a Memory Controller Design 1: Use of Processor IP cores Design 2: Custom Design Which should be faster and more reliable to implement?

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Design 1: Area- based on IP core and targeted device Power PC Small Microprocessor However… Don’t forget about Processor Bus structure Interface controllers SOFTWARE!!!!!!!!!!!!!!!!!!!!!!!!!!

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Complexity of Processor Based Systems PROCESSOR MEMORY SOFTWARE INTERFACE Verification Power Area Complexity Levels of Abstraction FPGA Solution SEU Mitigation? Simpler Solution All Hardware Structured SEU Mitigation

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Design 2: VHDL – Address is Calculated Elsewhere and Supplied SRAM_D 'Z'); BLEN <= '0'; BLHN <= '0'; SRAM_A <= address; SRAM_CE <= '0'; process(sysclk,reset)begin if reset = '0' then data_out '0'); do_write_1q <= '0'; do_write_2q <= '0'; oe <= '0'; SRAM_OE <= '0‘ SRAM_WR <= ‘1'; new_data_1q <= '0'; elsif rising_edge(sysclk) then new_data_1q <= new_data; do_write_1q <= do_write; do_write_2q <= do_write_1q; if do_write = '1' then SRAM_WR <= '0'; SRAM_WR <= '0';else SRAM_WR <= '1 end if; SRAM_WR <= '1 end if; if do_write = '1' or do_write_1q = '1' then oe <= '1'; oe <= '1'; SRAM_OE <= '1'; SRAM_OE <= '1'; elsif do_write_2q = '1' then oe <= '0'; oe <= '0'; SRAM_OE <= '0'; SRAM_OE <= '0'; end if; if new_data_1q='1' then data_out <= SRAM_D; data_out <= SRAM_D; end if; end process; SRAM INTERFACE SYSCLK RESET DO_WRITE ADDRESS(19:0) NEW_DATA BLHN SRAM_WR SRAM_A(19:0) DATA_OUT(15:0) SRAM_D(15:0) SRAM_CE SRAM_OE BLEN

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Design 2: Synthesis Resource Mapping Report --------------------------------------- Resource Usage Report for sram_interface Mapping to part: xc3s1000ft256-4 Cell usage: FDC 3 uses FDCE 17 uses FDP 1 use FDPE 16 uses GND 1 use LUT1 2 uses LUT2 1 use LUT3 1 use Global Clock Buffers: 1 of 8 (12%) Mapping Summary: Total LUTs: 4 (0%)

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop And… For the Old School Folks… Target Part: rt54sx32-2 Combinational Cells: 5 of 1800 (0%) Sequential Cells: 22 of 1080 (2%) Total Cells: 27 of 2880 (1%) Clock Buffers: 2 IO Cells: 97 Details: and3b: 1comb:1 cm8: 3comb:1 dfp1b: 1seq:1 or2: 1comb:1 dfc1b: 3seq:1 dfe3c: 18seq:1 bibuf: 16 clkbuf: 1clock buffer hclkbuf: 1clock buffer inbuf: 38 outbuf: 41

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Design 2 is clearly the winner Experienced designer will make the choice of design 2 without question Time for writing VHDL (in this case) is much quicker than instantiating all IP required and implementing software. Major Benefits – KEY OF PRESENTATION Design 2 is easier to Verify Design 2 has less circuitry and is inherently more reliable! Design 2 is Deterministic no system overhead

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Migration … Software to Hardware Increases Reliability What Algorithms are prime? Image processing Digital signal Processing (FIR, FFT, Transforms, etc…) Command and Data Handling General Calculations Interface Control (Physical layer and above) The list goes on…

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Reliability and the Design Cycle

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop The Design Cycle: Key … Minimize the Cycles! Synthesis HDL or Schematic Place & Route Configuration Description Gate Level Netlist Simulator BUG! Verify Board Level Verification Gate Level Netlist + PR Static Timing Analysis (STA) @ every step BUG!

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Reliability: HDL vs. Schematic Schematic: Old Method of design Describes design by drawing gates and connectors OK for 100’s of gates Difficult to Verify large design However, no discrepancy of actual gates used HDL (NOT SOFTWARE!) New method of design Hardware Description Language Successful in implementing millions of gates Easier to verify Must design by the “rules” to avoid synthesis gate level discrepancies MUX A B IN OUT IF IN = ‘0’ THEN OUT <= A; ELSE OUT <= B; END IF;

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Mathematicians & Hardware Engineers found that performance P(t) is directly proportional to the following formulae. P(t) F(t)e h(t) – e g/h(t) * F(t) : I no (t) H(t) : I no HW(t) G(T): I am SWE * This is a JOKE!!!!!!!!! VHDL vs. Verilog – On Going Debate Put to REST!!!

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Complexity of Verification – What’s the Issue? Functional State space has increased – more gates: 2 #DFFs+IO Space designs must include SEU mitigation and thus exponentially increases the verification state space: 2 #DFFs+IO → 2 #DFFS+IO+GateInputs Computers are not fast enough to simulate over the entire state space Lab tests may not be able to test to full coverage Definition of test coverage is generally not accurate for complex designs … DID YOU THINK OF EVERY CORNOR POINT? Toggle specifications generally do not take into account all possible combinations SEU and SET simulations have not become a part of verification specifications

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Complexity of Verification – What to do? Lessons learned is key! (ASIC Industry) Verification Teams must be constituted Bus Functional Models (BFMs) and Self- Checking are key >>> approaches reality Verification methodologies of clock domain crossings must be established Complex Designs must follow structured guidelines (i.e. “Synchronous Design” & “Design for Test, Design Reviews) When done correctly, will reduce the Design Cycle

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Importance of BFMs – Will Your Eyes Catch Everything?

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Synchronous Design and its Role in Verification Defined as part of the “Design for Test” (DFT) Methodology movement…became big in the 90’s Moves a design into a discrete time domain vs. Asynchronous and its continuous time domain Static Timing Analysis (STA) can be easily performed on every path Input to first DFF DFF to DFF DFF to output After STA verification, Simulations can confidently be performed at the RTL level Much faster than gate level Imperative for large designs However - BEAWARE of crossing clock domains!!!!

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg: NASA Goddard REAG New Electronics and Insertion into Flight Programs Workshop Summary FPGAs have proven to be cost effective solutions to large, complex systems Trade-offs between device type, design complexity, and reliability requirements must be made on a project to project basis Complexity Issues: As the number of gates increase, functional complexity increases exponentially ~ 2 #DFFs+IO Necessary enhancements for the improvement of system reliability increases the complexity of the design cycle. The commercial world is a large community Solved many problems many years ago Developed design guidelines Improved the Verification process Due to the level of design complexity, the Aerospace community will hugely benefit from lessons learned within the commercial industry

Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg MEI Technologies Incorporated NASA/GSFC Radiation Effects.

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Complexity of FPGAs - Implications to Design Reliability and Radiation Performance Melanie Berg MEI Technologies Incorporated NASA/GSFC Radiation Effects.

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