1. Integrated Circuit Devices
Professor Ali Javey
Summer 2009
MOS Capacitors
Reading: Chapter 16

2. MOS Capacitors MOS: Metal-Oxide-Semiconductor MOS transistor
EE143 – Ali Javey

4. Ideal MOS Capacitor
Oxide has zero charge, and no current can pass through it.
No charge centers are present in the oxide or at the oxide-semiconductor interface.
Semiconductor is uniformly doped
M = S =  + (EC – EF)FB

5. Ideal MOS Capacitor At Equilibrium:

6. Ideal MOS Capacitor Under Bias
Let us ground the semiconductor and start applying different voltages, VG, to the gate
VG can be positive, negative or zero with respect to the semiconductor
EF,metal – EF,semiconductor = – q VG
Since oxide has no charge (it’s an insulator with no available carriers or dopants), d Eoxide / dx = / = 0; meaning that the E-field inside the oxide is constant.

7. Inversion condition
If we continue to increase the positive gate voltage, the bands at the semiconductor bends more strongly. At sufficiently high voltage, Ei can be below EF indicating large concentration of electrons in the conduction band.
We say the material near the surface is “inverted”. The “inverted” layer is not gotten by chemical doping, but by applying E-field. Where did we get the electrons from?
When Ei(surface) – Ei(bulk) = 2 [EF – Ei(bulk)], the condition is start of “inversion”, and the voltage VG applied to gate is called VT (threshold voltage). For VG > VT, the Si surface is inverted.

9. Ideal MOS Capacitor – n-type Si

11. Electrostatic potential, (x)
Define a new term, (x) taken to be the potential inside the semiconductor at a given point x. [The symbol  instead of V used in MOS work to avoid confusion with externally applied voltage, V]
Potential at any point x
Surface potential
| F | related to doping
concentration
F > 0 means p-type F < 0 means n-type

12. Electrostatic potential
S is positive if the
bands bend\ …….?
S = 2F at the
depletion-inversion
transition point (threshold voltage)

13. Charge Density - Accumulation
M O S
p-type silicon
accumulation condition
The accumulation charges in the semiconductor are ……. , and appear
close to the surface and fall-off
rapidly as x increases.
One can assume that the free carrier concentration at the oxide-semiconductor interface is a -function.
VG < 0
p-Si
Accumulation of holes x
Charge on metal = QM
Charge on semiconductor =  (charge on metal)
|QAccumulation| = |QM|

14. Charge Density - Depletion
p-type Si,
depletion condition
The depletion charges in Si are immobile ions - results in depletion
layer similar to that in pn
junction or Schottky diode.
VG > 0
M O S
p-Si
Depletion of
holes w QM
|q NA A W| = |QM|
() (+)
If surface potential is s, then the depletion layer width W will be

15. Charge Density - Inversion
VG>>0
M O S
p-Si
p-type Si,
strong inversion
Once inversion charges
appear, they remain close to the surface since they are
…….. Any additional voltage to the gate results in extra QM in gate and get compensated by extra inversion electrons in
semiconductor. QM w
Depletion of
holes
Inversion electrons:
-function-like
So, the depletion width does not change during inversion. Electrons appear as -function near the surface. Maximum depletion layer width W = WT

16. MOS C-V characteristics
The measured MOS capacitance (called gate capacitance) varies with the applied gate voltage
A very powerful diagnostic tool for identifying threshold voltage, oxide thickness, substrate doping concentration, and flat band voltage.
It also tells you how close to an ideal MOSC your structure is.
Measurement of C-V characteristics
Apply any dc bias, and superimpose a small (15 mV) ac signal (typically 1 kHz – 1 MHz)

17. C-V: under accumulation
M O S
Consider p-type Si under accumulation.
VG < 0.
Looks similar to parallel
plate capacitor.
CG = Cox
where Cox = (ox A) / xox
p-Si
VG < 0
Accumulation of holes x
CG is constant as a function of VG

18. CG decreases with increasing VG
C-V: under depletion
Depletion condition:
VG > 0
M O S
p-type Si
VG > 0
CG is Cox in series with Cs where Cs can be defined as “semiconductor capacitance”
Depletion of
holes W QM
Cox Cs
Cox=ox A / xox
Cs = Si A / W
CG = Cox Cs / (Cox + CS)
where s is surface potential
CG decreases with increasing VG

19. C-V: under inversion (high frequency)
VG = VT and VG > VT
Inversion condition s = 2 F
VG >>0
M O S
p-Si
Depletion of
holes W QM
Inversion electrons
- function
Cox Cs
At high frequency, inversion
electrons are not able to respond
to ac voltage.
Cox=ox A / xox
Cs = Si A / WT
CG ( ) = Cox Cs / (Cox + CS)
CG will be constant for VG  VT

20. C-V: under inversion (low frequency)
At low frequency, the inversion electrons will be able to respond to the ac voltage. So, the gate capacitance will be equal to the “oxide capacitance” (similar to a parallel plate capacitance).
CG (  0) = Cox
= ox A / xox
Cox
low frequency C
high frequency Vg
Vfb Vt
accumulation
depletion
inversion
Ideal MOSC (p-type Si)
CG increases for VG  VT until it reaches Cox