1. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 1 Routability Driven White Space Allocation for Fixed-Die Standard-Cell Placement Xiaojian Yang Bo-Kyung Choi Majid Sarrafzadeh Embedded and Reconfigurable Lab Computer Science Department, UCLA Xiaojian Yang Bo-Kyung Choi Majid Sarrafzadeh Embedded and Reconfigurable Lab Computer Science Department, UCLA

2. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 2OutlineOutline Motivation and Previous Work White Space Allocation Approach Placement with White Space Experimental Results Conclusion Motivation and Previous Work White Space Allocation Approach Placement with White Space Experimental Results Conclusion

3. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 3MotivationMotivation Fixed-die Placement with White Space Wirelength or Routability? Fixed-die Placement with White Space Wirelength or Routability? Tight Placement Tight Placement Loose Placement Loose Placement Better for Wirelength/Timing Wirelength/Timing Routability Routability

4. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 4 Different White Space Distribution Dragon’s result without white space, Shortest Wirelength (498) unroutable unroutable

5. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 5 Different White Space Distribution Dragon’s result with uniform white space, Short Wirelength (509) unroutable unroutable

6. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 6 Different White Space Distribution QPlace’s result, Wirelength = 589 routable routable

7. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 7 Different White Space Distribution Dragon’s result with congestion-driven allocation, Wirelength = 573 routable routable

8. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 8 Previous Work Parakh, Brown, Sakallah, “Congestion Driven Quadratic Placement”, DAC 1998 Caldwell, Kahng, Markov, “Can Recursive Bisection Alone Produce Routable Placements?”, DAC 2000 Industrial Placement Tools Parakh, Brown, Sakallah, “Congestion Driven Quadratic Placement”, DAC 1998 Caldwell, Kahng, Markov, “Can Recursive Bisection Alone Produce Routable Placements?”, DAC 2000 Industrial Placement Tools

9. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 9 Our Contribution Fast and effective white space allocation approach which does not affect the running time of the placement process Aggressively allocating white space to maximize the effect of alleviating congestion A study on wirelength optimization considering white space Fast and effective white space allocation approach which does not affect the running time of the placement process Aggressively allocating white space to maximize the effect of alleviating congestion A study on wirelength optimization considering white space

10. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 10 Allocation in Top-Down Placement We allocate white space at finer placement level, because we have more accurate congestion map. Final FinalPlacement Placement Allocate white Space here Allocate white Space here

11. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 11 Global Placement w/o White Space 0% white space 0% white space

12. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 12 White Space Allocation Process 13% white space 13% white space Step 1: Global Placement Step 1: Global Placement BinsCellsWhite Space

13. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 13 White Space Allocation Process 13% white space 13% white space Step 2: Congestion Estimation Step 2: Congestion Estimation

14. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 14 White Space Allocation Process 13% white space 13% white space Step 2: Congestion Estimation Step 2: Congestion Estimation

15. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 15 White Space Allocation Process 13% white space 13% white space Step 3: Allocating white space Step 3: Allocating white space

16. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 16 White Space Allocation Process 13% white space 13% white space Step 4: Moving cells to match the white space Step 4: Moving cells to match the white space

17. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 17 White Space Allocation Process 13% white space 13% white space Step 5: Wirelength Optimization with white space Step 5: Wirelength Optimization with white space

18. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 18 White Space Allocation Process 13% white space 13% white space Step 6: Second allocation and detailed placement Step 6: Second allocation and detailed placement

19. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 19 Allocation Based on Congestion Congestion estimation for each bin Cheng ICCAD’94 Lou et al. ISPD’01 Yang, Kastner, Sarrafzadeh ICCAD’01 White spaces are allocated into bins according to bin congestion First assign white space into rows, then bins Congestion estimation for each bin Cheng ICCAD’94 Lou et al. ISPD’01 Yang, Kastner, Sarrafzadeh ICCAD’01 White spaces are allocated into bins according to bin congestion First assign white space into rows, then bins

20. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 20 White Space Allocation

21. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 21 Aggressive Allocation Tight placement for non-congested area, loose placement for congested area. Depends on: Congestion cost function Allocation strategy Tight placement for non-congested area, loose placement for congested area. Depends on: Congestion cost function Allocation strategy Non-aggressiveNon-aggressive AggressiveAggressive

22. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 22 Post Allocation Optimization Improving wirelength using simulated annealing Cells are swapped between bins White spaces of bins are reserved Variable bin width Keep row balance in annealing: total cell width plus total white space in each row is balanced Improving wirelength using simulated annealing Cells are swapped between bins White spaces of bins are reserved Variable bin width Keep row balance in annealing: total cell width plus total white space in each row is balanced

23. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 23 Experimental Setup Cadence QPlace Cadence WRoute LEF/DEFLEF/DEF Dragon (Fixed-die) Capo MetaPlacer IBM-PLACE2IBM-PLACE2 Placed DEF Allocation algorithm has been incorporated into Dragon

24. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 24 Benchmarks (IBM-PLACE 2.0) Converted from ISPD98 partitioning net-lists New features for IBM-PLACE 2.0: LEF/DEF and GSRC bookshelf format Cell sizes are similar with the standard-cells in TSMC 0.18um library (from Artisan Inc.) Aspect ratio 1.0 (arbitrary number of rows) No space between rows Over-the-cell routing with 4 or 5 routing layers Exact pin locations (not center-of-cell) Predefined core size with white space 5%-15% Each circuit corresponds to an easy and a hard instance Limitations No clock/power/ground signals No pin input/output information No I/O pads connections Converted from ISPD98 partitioning net-lists New features for IBM-PLACE 2.0: LEF/DEF and GSRC bookshelf format Cell sizes are similar with the standard-cells in TSMC 0.18um library (from Artisan Inc.) Aspect ratio 1.0 (arbitrary number of rows) No space between rows Over-the-cell routing with 4 or 5 routing layers Exact pin locations (not center-of-cell) Predefined core size with white space 5%-15% Each circuit corresponds to an easy and a hard instance Limitations No clock/power/ground signals No pin input/output information No I/O pads connections

25. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 25 Experimental Results QPlaceCapoDragon IBM01 (85%) IBM01 (88%) IBM02 (90%) IBM02 (95%) IBM07 (90%) IBM07 (95%) IBM08 (90%) IBM08 (95%) IBM09 (90%) IBM09 (95%) IBM10 (90%) IBM10 (95%) IBM11 (90%) IBM11 (95%) IBM12 (85%) IBM12 (90%) SuccessfulSuccessful Finished with violations FailedFailed QPlaceCapoDragon 13415 341 -8- Summary:Summary:

26. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 26 Wirelength Comparison Overall Dragon’s results are 8.8% shorter than QPlace’s

27. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 27 Runtime Comparison Placement time: Dragon is 10-15 times slower than QPlace Good placements significantly reduce routing time: Dragon’s placements get up to 3x speedup in routing compared with QPlace’s (on average 21% saving) Total Place/Route time: Dragon takes 0.4-3.2 times of QPlace’s cost. (In most cases 1.5-2.5) Placement time: Dragon is 10-15 times slower than QPlace Good placements significantly reduce routing time: Dragon’s placements get up to 3x speedup in routing compared with QPlace’s (on average 21% saving) Total Place/Route time: Dragon takes 0.4-3.2 times of QPlace’s cost. (In most cases 1.5-2.5)

28. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 28 Different White Space Distribution QPlace’s result, Wirelength = 590 routable routable

29. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 29 Different White Space Distribution Dragon’s result with congestion-driven allocation, Wirelength = 579 routable routable

30. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 30 Different White Space Distribution Capo/MetaPlacer’s result, Wirelength = 563 unroutable unroutable

31. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 31 Congestion and White Space congestion map before allocation congestion map before allocation white space map for the final placement white space map for the final placement

32. International Symposium on Physical Design San Diego, CA April 2002ER UCLA UCLA 32 Conclusion & Future Work Congestion aware white space allocation improves routability Aggressively allocating white space helps routing in hard cases Open problem: multiple objectives during placement Congestion aware white space allocation improves routability Aggressively allocating white space helps routing in hard cases Open problem: multiple objectives during placement