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VGA Interface1 trend toward higher levels of integration Evolution of implementation technologies zLogic gates (1950s-60s) zRegular structures for two-level.

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Presentation on theme: "VGA Interface1 trend toward higher levels of integration Evolution of implementation technologies zLogic gates (1950s-60s) zRegular structures for two-level."— Presentation transcript:

1 VGA Interface1 trend toward higher levels of integration Evolution of implementation technologies zLogic gates (1950s-60s) zRegular structures for two-level logic (1960s-70s) ymuxes and decoders, PLAs zProgrammable sum-of-products arrays (1970s-80s) yPLDs, complex PLDs zProgrammable gate arrays (1980s-90s) ydensities high enough to permit entirely new class of application, e.g., prototyping, emulation, acceleration

2 VGA Interface2 Gate Array Technology (IBM - 1970s) zSimple logic gates ycombine transistors to implement combinational and sequential logic zInterconnect ywires to connect inputs and outputs to logic blocks zI/O blocks yspecial blocks at periphery for external connections zAdd wires to make connections ydone when chip is fabbed x“mask-programmable” yconstruct any circuit

3 VGA Interface3 Field-Programmable Gate Arrays zLogic blocks yto implement combinational and sequential logic zInterconnect ywires to connect inputs and outputs to logic blocks zI/O blocks yspecial logic blocks at periphery of device for external connections zKey questions: yhow to make logic blocks programmable? yhow to connect the wires? yafter the chip has been fabbed

4 VGA Interface4 Enabling Technology zCheap/fast fuse connections ysmall area (can fit lots of them) ylow resistance wires (fast even if in multiple segments) yvery high resistance when not connected ysmall capacitance (wires can be longer) zPass transistors (switches) yused to connect wires ybi-directional zMultiplexors yused to connect one of a set of possible sources to input ycan be used to implement logic functions

5 VGA Interface5 Programming Technologies zFuse and anti-fuse yfuse makes or breaks link between two wires ytypical connections are 50-300 ohm yone-time programmable (testing before programming?) zEPROM and EEPROM yhigh power consumption ytypical connections are 2K-4K ohm yfairly low density zRAM-based ymemory bit controls a switch that connects/disconnects two wires ytypical connections are.5K-1K ohm ycan be programmed and re-programmed easily (tested at factory)

6 VGA Interface6 Tradeoffs in FPGAs zLogic block - how are functions implemented: fixed functions (manipulate inputs) or programmable? ysupport complex functions, need fewer blocks, but they are bigger so less of them on chip ysupport simple functions, need more blocks, but they are smaller so more of them on chip zInterconnect yhow are logic blocks arranged? yhow many wires will be needed between them? yare wires evenly distributed across chip? yprogrammability slows wires down – are some wires specialized to long distances? yhow many inputs/outputs must be routed to/from each logic block? ywhat utilization are we willing to accept? 50%? 20%? 90%?

7 VGA Interface7 Xilinx Programmable Gate Arrays zCLB - Configurable Logic Block y5-input, 1 output function yor 2 4-input, 1 output functions yoptional register on outputs zBuilt-in fast carry logic zCan be used as memory zThree types of routing ydirect ygeneral-purpose ylong lines of various lengths zRAM-programmable ycan be reconfigured

8 Programmable Interconnect I/O Blocks (IOBs) Configurable Logic Blocks (CLBs)


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