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Company Confidential | ©2009 Micron Technology, Inc. | 1 Micron Contact: Tim Hollis 208-363-3944 February 16 University of Utah Senior.

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Presentation on theme: "Company Confidential | ©2009 Micron Technology, Inc. | 1 Micron Contact: Tim Hollis 208-363-3944 February 16 University of Utah Senior."— Presentation transcript:

1 Company Confidential | ©2009 Micron Technology, Inc. | 1 Micron Contact: Tim Hollis thollis@micron.com 208-363-3944 February 16 University of Utah Senior Clinic 2009-2010

2 Company Confidential | ©2009 Micron Technology, Inc. | 2 High-level Summary of the Proposed Project Investigate the accuracy of the so-called “2-phase” or “2- pass” power supply noise analysis methodology. Identify limitations in the algorithm and recommend constraints which can be applied to limit sensitivity to any inherent error. ▶ When is the analysis valid and when should a more comprehensive analysis be applied? Provide recommendations for enhancing the accuracy of the methodology.

3 Company Confidential | ©2009 Micron Technology, Inc. | 3 Background Power delivery is quickly becoming more and more complicated

4 Company Confidential | ©2009 Micron Technology, Inc. | 4 Background As integrated circuit (IC) operating frequencies and signaling datarates continue to increase: 1. The characteristics of the power delivery network (PDN) appear less and less ideal. 2. The non-idealities of the PDN become more problematic, because there is less voltage and/or timing margin to work with. R PBus Vcc Gnd C Die Vcc Gnd C DIMM C MthrBrd L DIMM L MthrBrd L DIMM L MthrBrd L Package Vcc CKT Gnd CKT = Vcc CKT = Gnd CKT

5 Company Confidential | ©2009 Micron Technology, Inc. | 5 Impact of PDN Non-idealities Same Data Pattern

6 Company Confidential | ©2009 Micron Technology, Inc. | 6 Off-Chip Power Delivery The impedance of the off-chip power delivery incorporates a combination of inductive, capacitive, and resistive effects. Even when the PDN impedance is very low (fraction of an Ohm), the large high-frequency currents drawn by today’s ICs can induce large voltage variation across the PDN.

7 Company Confidential | ©2009 Micron Technology, Inc. | 7 GDDR4 (Graphics DRAM) Supply Noise 327mVpp 383mVpp Bottom of Package showing Ball Grid Array (BGA)

8 Vdd Vss On-Chip Power Delivery Every circuit mapped to a corresponding x-y Pbus coordinate

9 Company Confidential | ©2009 Micron Technology, Inc. | 9 On-Chip Power Delivery February 16 PKG VCCQ VSSQ VCC GND PKG VCC VCCQ VSSQ GND PKG VCC VCCQ VSSQ GND

10 Company Confidential | ©2009 Micron Technology, Inc. | 10 Simulation Time vs. Model Complexity Ideal PDN + PowerBus + Package + ArrayCurrentCombine Package And PowerBus Combine Package, PowerBus, and ArrayCurrent Combine Package, PowerBus, ArrayCurrent, and LogicNoise

11 Company Confidential | ©2009 Micron Technology, Inc. | 11 Measurement Accuracy “Essentially, all models are wrong, but some are useful” George E. P. Box (Professor Emeritus of Statistics at the University of Wisconsin)

12 Company Confidential | ©2009 Micron Technology, Inc. | 12 2-Phase (or 2-pass) Supply Noise Analysis Vcc Gnd Vcc Gnd I Ckt Vcc Gnd I Ckt +V-+V- +V-+V- Phase 1: Run time-domain simulation with all circuitry in place and capture circuit-specific currents into and out of the supplies Phase 2: Apply extracted currents to full Power Delivery Network and capture static and dynamic voltage changes Z PDN

13 Company Confidential | ©2009 Micron Technology, Inc. | 13 2/12/2016©2008 Apache Design Solutions Industry Example 1 Apache’s T otem, CPM, and Redhawk Tools Static and Dynamic IR/EM Maps Power nets Ground nets Taken from “Early Analysis Using RH/Totem: Prototyping, Early CPM Creation and Co-design,” Apache Design Solutions, 2008

14 Company Confidential | ©2009 Micron Technology, Inc. | 14 “Voltagestorm Power and Power Rail Verification,” Cadence Design Systems, Inc. Online Datasheet Industry Example 2 Cadence’s VoltageStorm

15 Company Confidential | ©2009 Micron Technology, Inc. | 15 A recent presentation from Hynix Semiconductor shows the output of a tool applying the 2-phase analysis method J. Lee, “Chip-level Power Integrity: Trend and Challenge for On-chip PDN Design,” online: http://www.google.com/url?sa=t&source=web&ct=res&cd=4&url=http%3A%2F%2Fwww.ansoft.co.uk%2Ffirstpass%2Fpdf%2FChip_Level_Power_Integrity%3DHynix.pdf&ei=ViuYSu_oLIb2sQOW95W4Ag&usg=AFQjCNG7K-GWsFS-5lO16MNL0dwP74l7mghttp://www.google.com/url?sa=t&source=web&ct=res&cd=4&url=http%3A%2F%2Fwww.ansoft.co.uk%2Ffirstpass%2Fpdf%2FChip_Level_Power_Integrity%3DHynix.pdf&ei=ViuYSu_oLIb2sQOW95W4Ag&usg=AFQjCNG7K-GWsFS-5lO16MNL0dwP74l7mg Industry Example 3 Images from Hynix Power Delivery Presentation

16 Company Confidential | ©2009 Micron Technology, Inc. | 16 Industry Example 4 Synopsys’ Power Net Reliability Analysis Tool Page taken from Synopsys’ HSIM Plus Reference Manual Summarizes 2-phase Method applied by PWRA (Power Net Reliability Analysis) tool – Part of the HSIM Plus Suite

17 Company Confidential | ©2009 Micron Technology, Inc. | 17 Some Issues with 2-Phase Analysis Analysis runs Open-loop, whereas in reality, the circuits respond to supply variation (there is feedback) Current depends on V DS Vcc Gnd I Ckt Vcc Gnd I Ckt Gnd I PU I PD Vcc VCC and GND currents aren’t the same, implying the need for 2 current sources, but can they be connected in series? Nonlinear Effects

18 Company Confidential | ©2009 Micron Technology, Inc. | 18 Suggestions for Investigation General Questions: What is the error associated with an open-loop methodology? Are certain circuits more sensitive to the error (nonlinear circuits, noise-sensitive circuits, etc.)? Can this method be used to verify circuit timing? Does the method apply more accurately to certain power domains? ▶ For example, Input/Output domains where current also flows in and out of the signal path or Internal Logic domains where nearly all current flows directly from one supply to the other. ▶ What about circuits on the domain boundary? Implementation Questions: What about multi-phase analysis, rather than just two phases? ▶ Capture currents, Capture supply voltages, Recapture currents,... How should the two current sources (pull-up and pull-down) be combined, or can they? How does capturing the initial currents with the Decoupling Capacitance in place effect the accuracy?

19 Company Confidential | ©2009 Micron Technology, Inc. | 19 Deliverables Let’s publish a paper! Publishing will require three things: ▶ Background: The team will need to gather details from additional references. ▶ Rigor: Quantitative data on Voltage and Timing Error versus Simulation Time and Memory Requirements. ▶ Contribution: Proposals for how to improve on the methodology or how to replace it completely. Deliverable = Publication-ready Paper

20 Company Confidential | ©2009 Micron Technology, Inc. | 20 Resources Tim Hollis – Micron Technology, Inc. ▶ thollis@micron.com thollis@micron.com Fuad Badrieh – Micron Technology, Inc. ▶ fbadrieh@micron.com fbadrieh@micron.com Eric Booth – Micron Technology, Inc. ▶ ebooth@micron.com ebooth@micron.com Louis Do – Apache Design Solutions (tentative collaboration with Apache) ▶ ldo@apache-da.com ldo@apache-da.com

21 February 16

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