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1/11/2016B.Ramamurthy1 Exam #3 Review CSE 241 B.Ramamurthy.

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Presentation on theme: "1/11/2016B.Ramamurthy1 Exam #3 Review CSE 241 B.Ramamurthy."— Presentation transcript:

1 1/11/2016B.Ramamurthy1 Exam #3 Review CSE 241 B.Ramamurthy

2 1/11/2016B.Ramamurthy2 Place and Time Date: 4/26/2010, Monday Time: 1-1.50AM Place: 109 Knox Please bring Pencils, pens and erasers. Closed book exam;

3 1/11/2016B.Ramamurthy3 Topics Chapter 5: MSI Circuits and Programmable logic devices Carry look ahead adder, decoders, multiplexers, designing with PROMs, PLAs Chapter 6: Flip-flops and simple flip-flop applications SR, JK, D and T FFs, design of synchronous counters Chapter 7: Synchronous sequential networks Sequential network analysis, and synthesis Circuit  state diagram, state diagram  Circuit

4 1/11/2016B.Ramamurthy4 Specific Sections Chapter 5: 5.1.2, 5.4, 5.6, 5.8, 5.9 Chapter 6: 6.6 (table 6.1), 6.8, 6.9.1, 6.9.2 Chapter 7: 7.2, 7.3 Homeworks: 8, 9, 10

5 1/11/2016B.Ramamurthy5 Format & Topic for questions 5 questions: with average time allocated 10 min per question Possible questions: 1. Internal circuit of a simple 2 bit adder with carry 2. Cascading decoder, multiplexers etc. to make larger ones 3. Combinational circuits using MSI circuits: decoder, mux 4. Designing using PROM and PLA: what is the difference? 5. Designing mod-x counters using FFs 6. Analysis of sequential circuits 7. Synthesis of sequential circuits

6 Remember.. Learn from the homework assigned Find ways to efficiently answer questions Find ways to not make silly mistakes Create a mental checklist to make sure you have not missed anything important on the exam (like your name of the exam paper!) Read the question paper and strategize on the order in which you will answer the questions: Best ROI first Come prepared: there is no substitute for hard work. 1/11/2016B.Ramamurthy6

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