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Instructors: Fu-Chiung Cheng ( 鄭福炯 ) Associate Professor Computer Science & Engineering Tatung University.

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Presentation on theme: "Instructors: Fu-Chiung Cheng ( 鄭福炯 ) Associate Professor Computer Science & Engineering Tatung University."— Presentation transcript:

1 Instructors: Fu-Chiung Cheng ( 鄭福炯 ) cheng@cse.ttu.edu.tw http://www.cse.ttu.edu.tw/~cheng Associate Professor Computer Science & Engineering Tatung University Computer Aided Circuit Design

2 Information: Office: A5-608A Tel. No: 25925252 Ext 3284 Email: cheng@cse.ttu.edu.tw Http://www.cse.ttu.edu.tw/~cheng Class Lecture will be available on line Textbook: VHDL: Analysis and Modeling of Digital Systems Navabi. (McGRAW-HILL 1998) Reference book: VHDL for Logic Synthesis Andrew (Rushton. Wiley 1998)

3 Syllabus VHDL (VHSIC Hardware Description Language) A. Language Constructs B. VHDL programs Circuits C. Synopsis CAD tools. D. Xilinx CAD tools. Circuits Design: A. Combinational circuit design B. Sequential circuit design: Synchronous sequential circuit design. Asynchronous sequential circuit design.

4 Grading Homework Assignments: 40% (4 times). Midterm Exam: 25% Project: 35% A. Proposal. B. Design in VHDL C. Presentation D. Report.

5 Circuits: Review Circuit Combinational Circuit Sequential Circuit Synchronous Asynchronous

6 Combinational Circuits: Combinational circuits: The outputs of a system are independent of previous inputs. Examples: A. AND, OR, XOR, NOT, NAND … B. Multiplexer, Demultiplexer, Decoders, ROM,... C. Adder, Multipliers,... Methods to synthesize combinational circuits: A. Karnaugh maps B. Quine-McCluskey C. Boolean Algebra

7 Combinational Circuit: Name AND OR NOT NAND Symbol ABABAABABABAAB xxxxxxxx Function x=AB x=A+B x=A’ x=(AB)’

8 Combinational Circuits: 4 to 1 MUX Demux Decoder

9 Sequential Circuits Sequential circuits: The outputs of a system are dependent of previous inputs. Examples: A. Flip-Flops: SR F/F(latch), Trigger F/F(latch), JK clocked SR F/F, clocked JK F/F B. Counter, Shift Register, Methods to synthesize Sequential Circuits: A. Flow table( State machine)

10 SR Latch (Asynchronous) S R Q Q’

11 JK Latch(Asynchronous)

12 Clocked J-K F/F (Synchronous)

13 Asynchronous System Combinational Circuit... Latches...

14 Synchronous System Combinational Circuit... Clocked F/Fs... CK


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