1. Lisbon, 23/10/03TSS: ATLAS L1 Simulation / CTP1 From CTP-D to CTP Ideas from the top of my head Th. Schörner-Sadenius, U Hamburg I basically looked through my latest ATLAS talk (dating from January!) and at the L1 simulation documentation in ATL-DAQ-2003-011 … For more technical details please have a look at section 10 of this document.

2. Lisbon, 23/10/03TSS: ATLAS L1 Simulation / CTP2 THE CENTRAL TRIGGER PROCESSOR existing prototype 1 9U VME module final design ~7 different modules Lookup tables: ‘conditions’ Programmable devices: ‘items’ Dead time etc. Combination of ‘items’ One big FPGA Interfaces to detectors,LHC Input bits: multiplicities To Level2 Number of items? Changes depend on implementation and required precision of simulation.

3. Lisbon, 23/10/03TSS: ATLAS L1 Simulation / CTP3 L1 and CTP Simulation CTP simulation closely connected to simulation of configuration and to interfaces package.

4. Lisbon, 23/10/03TSS: ATLAS L1 Simulation / CTP4 Things To Do for CTP-D  CTP I … and possibly already done ;-)  Simulation adapted to N LUTs and CPLDs  use N=2, and default numbers of in- and outputs of the devices; other values only with care.  CTP may be different (1 big FPGA?). In principle can simulate with CPLDs and LUTs – but be careful that number of inputs (bits and multiplicities) does not exceed LUT capabilities.  One big FPGA allows for more flexibility – now assume LUTs do TriggerConditions and CPLDs TriggerItems  Never tested input lines (TriggerThresholds) as inputs to CPLDs (which is possible in CTP-D hardware).  Question of `threshold combinatorics’: check triggermenu for clever grouping of inputs on LUTs (thresholds with 1,2,3 bits, grouping to items etc.)…

5. Lisbon, 23/10/03TSS: ATLAS L1 Simulation / CTP5 Things To Do for CTP-D  CTP II  TriggerThresholds, Conditionds and Items  massive changes required in TrigT1Config and TrigT1Interfaces if separation in TriggerThresholds, TriggerConditions and TriggerItems obsolete.  Change the configuration step completely?  In any case: Change number of accepted inputs from calo and muon; CTP accepts much more than CTP-D  changes to XML hardware and configuration files and to some hardcoded numbers.

6. Lisbon, 23/10/03TSS: ATLAS L1 Simulation / CTP6 Things To Do for CTP-D  CTP III... if CTP implemented with FPGAs  requires changes in simulation configuration and in (initial steps towards) the hardware configuration: class LUT and CMB are part of both (a bit unfortunate …).  LUTs and CMBs now help define the number of accepted inputs, conditions and items.

7. Lisbon, 23/10/03TSS: ATLAS L1 Simulation / CTP7 Things To Do – in general... looking at section 10 of ATL-DAQ-2003-001 Data flow  Combination of calo and muon (RPC and TGC) simulation as inputs to CTP simulation?  Reconstructed RDO:  All RecXYZRoI classes provided?  Use in L2: L1ID in RecRDO?  CTP read-out path? (CTP RDO  L1 RDO)  Secondary RoIs?

8. Lisbon, 23/10/03TSS: ATLAS L1 Simulation / CTP8 Things To Do – in general Configuration  Combination of L1 configuration with HLT configuration (TrigConfig package)? Stand-alone version  Write-out configuration  LUT configuration already provided; proven to work together with CTP-D hardware.  CPLD code: write VHDL code; already started in CMB.cxx class  Clearly needs changes if CTP implementation differs a lot from CTP-D.