1. A Linearized Cascode CMOS Power Amplifier 指導教授：林志明 老師 研究生：林高慶 學號： 95662002 Ko, Sangwon; Lin, Jenshan; Wireless and Microwave Technology Conference, 2006. WAMICON '06. IEEE Annual Dec. 2006 Page(s):1 - 4 Digital Object Identifier 10.1109/WAMICON.2006.351920

2. Outline Abstract Introduction Configuration of the predistorter Predistorter having positive AM-PM characteristic Schematic diagram of the power amplifier Simulation Conclusions

3. Abstract A 5.8 GHz cascode CMOS power amplifier was designed using a 0.18-um 1P6M mixed-mode CMOS process and a predistorter was customized for the cascode power amplifier and integrated with it A 29.3-dB improvement in the third order inter- modulation distortion when the predistorter is turned on

4. Introduction The linearization technique for the power amplifier in a mobile wireless gadget needs to be small in size and have high efficiency The impedance waveform of the diode- connected MOSFET is controllable using the width of the MOSFET

5. Configuration of the predistorter

6. Predistorter having positive AM-PM characteristic

7. Schematic diagram of the power amplifier

8. Simulation

9. Conclusions In order to compensate the negative AM-PM phase distortion of the cascode power amplifier, the predistorter was designed to have positive AMPM phase characteristic