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1 Chapter 2 Introduction To Finite State Machines Presented By: Cecilia Parng Class: C.S. 147 Prof: Sin-Min Lee.

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Presentation on theme: "1 Chapter 2 Introduction To Finite State Machines Presented By: Cecilia Parng Class: C.S. 147 Prof: Sin-Min Lee."— Presentation transcript:

1 1 Chapter 2 Introduction To Finite State Machines Presented By: Cecilia Parng Class: C.S. 147 Prof: Sin-Min Lee

2 2 Topics To Cover 2.1State Diagrams And State Tables 2.2Mealy And Moore Machines 2.3Designing State Diagrams

3 3 State Table Present state Inputs Next StateOutputs A state table is similar to the truth table present state all inputs next state all outputs.

4 4 Important Rule for State Table Complete state table must include each possible combination of present states and input values, and no such combination may match more than one row of the table

5 5 State Diagrams A state diagram: Each state is represented by a circled vertex Each row of the state table is shown as directed arc J’ Y

6 6 Important Rule for State Diagram State diagram has same situation as state table. Their conditions should be mutually exclusive, no input values should meet the condition of more than one arc.

7 7 The Alarm Clock Present state AlarmWeekdayNext state Turn off alarm OnXAwake in bed YesAsleep Awake in bedOffYes Awake and up No Awake in bed Off No AsleepNo

8 8 State Diagram for The Alarm Clock (a) Awake in bedAsleep Alarm’ Alarm Awake and up 1 (Always) Alarm Alarm’ /\ Weekday’ Alarm’ /\ Weekday Turn off Alarm = Yes ( a )

9 9 The alarm clock problem with inaction states Present stateAlarmWeekdayNext stateTurn off alarm AsleepOffX Asleep No Asleep On Awake in bed Yes Awake in bed On X Awake in bed yes Awake in bed OffYesAwake and upNo Awake in bedOffNoAsleep No Awake and upX X No X

10 10 State Diagram for The Alarm Clock State Diagram for The Alarm Clock (b) ( b ) AsleepAwake in bed Awake and up Alarm’ / 0 Alarm / 1 Alarm’ /\ Weekday’ / 0 1 (Always) / 0 Alarm’ /\ Weekday / 0 Alarm / 1 1 = yes turn off alarm (output) 0 – no turn off alarm (output)

11 11 State Tables for The JK Flip-Flop ( a ) Present State Y Z Z Z Z Y Y Y JK 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 Next StateQ Y Y Z Z Z Y Z Y 0 0 1 1 1 0 1 0

12 12 Condition in Terms of J and K Z J K J’K’ Q=0 Q=1 Y

13 13 Mealy and Moore Machines A finite state machine can represent outputs in one of two ways Moore Machines Mealy Machines

14 14 Moore Machines Associates its outputs with the states. Output values depend only on the state and not on the transitions. It requires less hardware to produce the output values It is well suited for representing the control units of microprocessors and cpu.

15 15 State Diagram for The Alarm Clock (a) Awake in bedAsleep Alarm’ Alarm Awake and up 1 (Always) Alarm Alarm’ /\ Weekday’ Alarm’ /\ Weekday Turn off Alarm = Yes Moore Machine

16 16 Mealy Machines Associates outputs with the transitions. It depends on both its state and its input values

17 17 State Diagram for The Alarm Clock State Diagram for The Alarm Clock (b) Mealy Machine AsleepAwake in bed Awake and up Alarm’ / 0 Alarm / 1 Alarm’ /\ Weekday’ / 0 1 (Always) / 0 Alarm’ /\ Weekday / 0 Alarm / 1

18 18 Designing State Diagrams Counter String Checker Toll Booth

19 19 Modulo 6 Counter A modulo 6 counter is a 3-bit counter that counts through the sequence. 000 001 010 011 100 101 000… 0 1 2 3 4 5 0 … Unlike a regular 3-bit counter 110(6) and 111(7) do not count 000 0 0 1 010 011 100 101 110 111

20 20 State Table for The Modulo 6 Counter Present StateNext StateCV 2 V 1 V 0 U S0S0 S0S0 S1S1 S1S1 S2S2 S2S2 S3S3 S3S3 S4S4 S4S4 S5S5 S5S5 1 0 0 1 0 1 0 1 0 1 0 1 S0S0 S1S1 S1S1 S2S2 S2S2 S3S3 S3S3 S4S4 S4S4 S5S5 S5S5 S0S0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 0 0 0 1 0 0

21 21 State Diagram for The Modulo 6 Counter (Mealy) S0S0 S5S5 S1S1 S4S4 S2S2 S3S3 0 / 10000 / 00010 / 0010 1 / 00011 / 0010 1 / 0011 0 / 0011 1 / 0100 0 / 0100 1 / 0101 0 / 0101 1 / 1000 ( a ) Mealy

22 22 State Diagram for The Modulo 6 Counter (Moore) S5S5 S0S0 S1S1 S4S4 S2S2 S3S3 U’ C=1 V =000 U C=0 V=0010 U C=0 V=010 U C=0 V=011 U C=0 V=100 U C=0 V=101 ( b ) Moore

23 23 String Checker A String Checker inputs a string of bits, one bits per clock cycle. It checks bits 1,2, and 2, then 2,3,and 4 and so forever 000 001 010 011 100 101 110 111

24 24 State Table For String Checker Present State S 0 S1 S 2 S 3 S 4 S 5 S 6 S 7 01010101010101010101010101010101 LNext State S0S1S2S3S4S5S6S7S0S1S2S3S4S5S6S7S0S1S2S3S4S5S6S7S0S1S2S3S4S5S6S7 M 00000010000000100000001000000010

25 25 State Diagrams for the String Checker ( Mealy) S3S3 S7S7 S0S0 S1S1 S4S4 S6S6 S5S5 S2S2 0/0 1/0 0/0 1/0 0/1 1/0 Mealy

26 26 State Diagrams for the String Checker (Moore) S7S7 S0S0 S6S6 S5S5 S4S4 S3S3 S2S2 S1S1 M=1 I’ M=0 I’ M=0 I I I I I’ I I I I M=0 Moore

27 27 Toll Booth Controller A toll booth controller has two external sensors. Indicates a car is at the toll booth Indicates a coin has been deposited in the toll booth’s collection basket and its value

28 28 States for the toll booth controller StateCondition S NOCAR S 0 S 5 S 10 S 15 S 20 S 25 S 30 S paid S cheat No car in toll booth Car in toll booth, 0 cents paid Car in toll booth, 5 cents paid Car in toll booth, 10 cents paid Car in toll booth, 15 cents paid Car in toll booth, 20 cents paid Car in toll booth, 25 cents paid Car in toll booth, 30 cents paid Car in toll booth, full toll paid Car left toll booth without paying full toll 1 0 0 0 1 0 1 0 1 R G A RRed light GGreen light AAlarm C = 1Car enters the toll booth C = 0No car arrives I 1 I 0 = 00no coin has been deposited I 1 I 0 = 01nickel has been deposited I 1 I 0 = 10dime has been deposited I 1 I 0 = 11quarter has been deposited

29 29 ***** The End

30 30 Happy Holidays


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