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© H. Heck 2008Section 2.71 Module 2:Measurement Topic 7:Time Domain Reflectometry OGI EE564 Howard Heck.

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Presentation on theme: "© H. Heck 2008Section 2.71 Module 2:Measurement Topic 7:Time Domain Reflectometry OGI EE564 Howard Heck."— Presentation transcript:

1 © H. Heck 2008Section 2.71 Module 2:Measurement Topic 7:Time Domain Reflectometry OGI EE564 Howard Heck

2 TDR EE 564 © H. Heck 2008 Section 2.72 Where Are We? 1.Introduction 2.Transmission Line Basics 1.Transmission Line Theory 2.Basic I/O Circuits 3.Reflections 4.Parasitic Discontinuities 5.Modeling, Simulation, & Spice 6.Measurement: Basic Equipment 7.Measurement: Time Domain Reflectometry 3.Analysis Tools 4.Metrics & Methodology 5.Advanced Transmission Lines 6.Multi-Gb/s Signaling 7.Special Topics

3 TDR EE 564 © H. Heck 2008 Section 2.73 Contents TDR Introduction Analysis Method Sources of Error Time Domain Transmission Summary References

4 TDR EE 564 © H. Heck 2008 Section 2.74 Time Domain Reflectometry (TDR) A time domain reflectometer is just a fast step generator with an oscilloscope. DUT Z L Oscilloscope Sampler Circuit Pulse Generator To use it:  Inject a fast (< 35 ps) edge onto the line from a 50  source.  Observe the reflected waveform back at the scope.  Use your knowledge of circuits and transmission lines to characterize the circuit under test. V i V r

5 TDR EE 564 © H. Heck 2008 Section 2.75 TDR #2 For example, the following waveforms show a TDR driving a 50  transmission line with unknown termination conditions. How is each terminated?

6 TDR EE 564 © H. Heck 2008 Section 2.76 TDR #3 TDR can also be used to characterize reactive elements: What are these?

7 TDR EE 564 © H. Heck 2008 Section 2.77 TDR Usage More on how to use TDR:  Identify regions of the TDR plot: Flat regions are transmission lines Upward spikes or bumps are inductances Downward spikes or bumps are capacitances Starting at the source  Determine the values of Z 0, t d, L, or C for the nearest element.  Simulate it to validate your finding and to determine the t r seen by the next element. (Iterate if needed.)  Move to the next element. You don’t need to create a model that has more resolution than your fastest rise time.

8 TDR EE 564 © H. Heck 2008 Section 2.78 TDR Example Same circuit when driven with t r = 200 ps. 5 nH 1 pF 45  /0.5ns 50  term 60  /0.5ns 5 nH

9 TDR EE 564 © H. Heck 2008 Section 2.79 Sources of Error in TDR Equipment  Scope (bandwidth, sampling rate)  Cable loss  Probe discontinuities (including ground loops)  Lack of standard Other Sources  Coupon design: must replicate board “upstream” elements  Measurement region (settling effects) Scope Cable Standard Probe Total error = Error scope + Error cable + Error probe [2.7.1]

10 TDR EE 564 © H. Heck 2008 Section 2.710 TDR Error Sources: Coupon Design Coupon design must replicate board “upstream elements.” L’ s & C’ s low-pass the signal, increasing the rise-time. This affects the reflections from down-stream elements:  Slows the rising edge  Spreads out response (convolution with slow edge)  L & C responses don’t go full swing This makes it  hard to extract exact L and C values  impossible to measure very small discontinuities However, if the TDR can’t see them, neither can the receiver.

11 TDR EE 564 © H. Heck 2008 Section 2.711 TDR Error Sources: Measurement Region For the Direct Rambus DRAM (RDRAM) channel design, Intel redefined the measurement window to reduce impedance measurement errors:  Spec = 28   10%  Initial measurement errors  3   With improved methodology, errors were reduced to < 0.5  100% Window Settling Region 50-70% Region

12 TDR EE 564 © H. Heck 2008 Section 2.712 Time Domain Transmission (TDT) This is a TDR, which is operated in TDT mode:  Terminate the line at the load/far end.  Launch at the source with a 50  probe.  Probe at both source and load with low capacitance, high impedance probes. Used primarily to measure propagation velocity.  Velocity is more difficult to measure than impedance, and is more susceptible to measurement errors.  Accuracy depends strongly on test structures, measurement procedures, and probe types.  Difficulty: determining exactly where on the signal edge to make the measurement.  Picosecond rise times are needed. Micro probing is highly recommended.

13 TDR EE 564 © H. Heck 2008 Section 2.713 TDT Examples

14 TDR EE 564 © H. Heck 2008 Section 2.714 Summary TDR offers a way to characterize the elements of your design for modeling purposes. Scope, cable, probe, test structures, etc. all add to measurement error. Use TDT to measure velocity.

15 TDR EE 564 © H. Heck 2008 Section 2.715 References S. Hall, G. Hall, and J. McCall, High Speed Digital System Design, John Wiley & Sons, Inc. (Wiley Interscience), 2000, 1 st edition. W. Dally and J. Poulton, Digital Systems Engineering, Chapters 4.3 & 11, Cambridge University Press, 1998. H. Johnson and M. Graham, High Speed Digital Design: A Handbook of Black Magic, PTR Prentice Hall, 1993. R. Poon, Computer Circuits Electrical Design, Prentice Hall, 1 st edition, 1995.

16 TDR EE 564 © H. Heck 2008 Section 2.716 References TDR & TDT Hewlett Packard Corp., “Time Domain Reflectometry Theory, Application Note 1304-2, May 1988. D. Smolyansky and S. Corey, “PCB Interconnect Characterization from TDR Measurements,” PCB Design, May 1999, pp. 18-25. Intel Corporation, PCB Test Methodology, August 1999, http://www.developer.intel.com. http://www.developer.intel.com D.J. Dascher, “Measuring Parasitic Capacitance and Inductance Using TDR,” Hewlett Packard Journal, Article 11, August 1996. J. McCall, “Successful PCB Testing Methodology,” PCB Design, June 1999, pp. 10-16. Tektronix, Inc., “AWG 610 Arbitrary Waveform Generator,” Product Data Sheet 76W-12991-0, April 1999.

17 TDR EE 564 © H. Heck 2008 Section 2.717 References TDR & TDT Hewlett Packard Corp., “Crosstalk and Impedance Measurements of PCB Board Patterns,” Application Note 339-3, September 1986. Hewlett Packard Corp., “Characteristic Impedance Measurement of PCB Board Patterns,” Application Note 339-2, June 1986. Hewlett Packard Corp., “Electronic Characterization of IC Packages,” Application Note 1255-5, June 1994.


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