1. ELEC 2200-002 Digital Logic Circuits Fall 2014 Switching Algebra (Chapter 2) Vishwani D. Agrawal James J. Danaher Professor Department of Electrical and Computer Engineering Auburn University, Auburn, AL 36849 http://www.eng.auburn.edu/~vagrawal vagrawal@eng.auburn.edu Fall 2014, Sep 29... ELEC2200-002 Lecture 4 1

2. Switching Algebra A Boolean algebra, where   Set K contains just two elements, {0, 1}, also called {false, true}, or {off, on}, etc.   Two operations are defined as, + ≡ OR, · ≡ AND. Fall 2014, Sep 29... ELEC2200-002 Lecture 4 2 +01 001 111 ·01 000 101

3. Claude E. Shannon (1916-2001) Fall 2014, Sep 29... ELEC2200-002 Lecture 4 3 http://www.kugelbahn.ch/sesam_e.htm

4. Shannon’s Legacy A Symbolic Analysis of Relay and Switching Circuits, Master’s Thesis, MIT, 1940. Perhaps the most influential master’s thesis of the 20 th century. An Algebra for Theoretical Genetics, PhD Thesis, MIT, 1940. Founded the field of Information Theory. C. E. Shannon and W. Weaver, The Mathematical Theory of Communication, University of Illinois Press, 1949. A “must read.” Fall 2014, Sep 29... ELEC2200-002 Lecture 4 4

5. Switching Devices Electromechanical relays (1940s) Vacuum tubes (1950s) Bipolar transistors (1960 - 1980) Field effect transistors (1980 - ) Integrated circuits (1970 - ) Nanotechnology devices (future) Fall 2014, Sep 29... ELEC2200-002 Lecture 4 5

6. Example: Automobile Ignition Engine turns on when Ignition key is applied AND Car is in parking gear OR Brake pedal is on AND Seat belt is fastened OR Car is in parking gear Fall 2014, Sep 29... ELEC2200-002 Lecture 4 6

7. Switching logic Fall 2014, Sep 29... ELEC2200-002 Lecture 4 7 Battery Key Parking gear Brake pedalParking gear Seat belt Motor

8. Define Boolean Variables Fall 2014, Sep 29... ELEC2200-002 Lecture 4 8 Battery Key Parking gear Brake pedalParking gear Seat belt Motor K = {0, 1} P = {0, 1} B = {0,1}P = {0, 1} S = {0, 1} 0 means switch “off” or “open” 1 means switch “on” or “closed” M = {0, 1}

9. Write Boolean Function Fall 2014, Sep 29... ELEC2200-002 Lecture 4 9 Battery Key Parking gear Brake pedalParking gear Seat belt Motor K = {0, 1} P = {0, 1} B = {0,1}P = {0, 1} S = {0, 1} Ignition function: M =K AND (P OR B) AND (S OR P) =K(P + B)(S + P) M = {0, 1}

10. Simplify Boolean Function Fall 2014, Sep 29... ELEC2200-002 Lecture 4 10 M =K AND (P OR B) AND (S OR P) =K(P + B)(S + P) =K(P + B)(P + S)Commutativity =K (P + B S)Distributivity

11. Construct an Optimum Circuit Fall 2014, Sep 29... ELEC2200-002 Lecture 4 11 Battery Key Parking gear Brake pedalSeat belt Motor K = {0, 1} P = {0, 1} B = {0,1}S = {0, 1} M =K (P + B S) M = {0,1} This is a relay circuit. Earlier logic circuits, even computers, were built with relays.

12. Implementing with Relays An electromechanical relay contains: Electromagnet Current source A switch, spring-loaded, normally open or closed Switch has two states, open (0) or closed (1). The state of switch is controlled by “not applying” or “applying” current to electromagnet. Fall 2014, Sep 29... ELEC2200-002 Lecture 4 12

13. One Switch Controlling Other Switches X and Y are normally open. Y cannot close unless a current is applied to X. Fall 2014, Sep 29... ELEC2200-002 Lecture 4 13 X Y Y = X

14. Inverting Switch Switch X is normally closed and Y is normally open. Y cannot open unless a current is applied to X. Fall 2014, Sep 29... ELEC2200-002 Lecture 4 14 X Y Y = X

15. Boolean Operations AND – Series connected relays. OR – Parallel relays. Fall 2014, Sep 29... ELEC2200-002 Lecture 4 15 A B F F = A B B F A F = A + B

16. Complement (Inversion) Fall 2014, Sep 29... ELEC2200-002 Lecture 4 16 A F F = A B F A F = A + B = A · B

17. Relay Computers Conrad Zuse (1910-1995) Fall 2014, Sep 29... ELEC2200-002 Lecture 4 17 Z1 (1938) Z3 (1941)

18. Electronic Switching Devices Fall 2014, Sep 29... ELEC2200-002 Lecture 4 18 Electron Tube Fleming, 1904 de Forest, 1906 Point Contact Transistor Bardeen, Brattain, Shockley, 1948

19. Transistor, 1948 Fall 2014, Sep 29... ELEC2200-002 Lecture 4 19 The thinker, the tinkerer, the visionary and the transistor John Bardeen, Walter Brattain, William Shockley Nobel Prize, 1956

20. Bell Laboratories, Murray Hill, New Jersey Fall 2014, Sep 29... ELEC2200-002 Lecture 4 20

21. Fall 2014, Sep 29... ELEC2200-002 Lecture 4 21

22. Bipolar Junction Transistor (BJT) Fall 2014, Sep 29... ELEC2200-002 Lecture 4 22

23. Field Effect Transistor (FET) Fall 2014, Sep 29... ELEC2200-002 Lecture 4 23 a.k.a. metal oxide semiconductor (MOS) FET. (metal oxide)

24. Integrated Circuit (1958) Fall 2014, Sep 29... ELEC2200-002 Lecture 4 24 Jack Kilby (1923-2005), Nobel Prize, 2000

25. MOSFET (Metal Oxide Semiconductor Field Effect Transistor) Fall 2014, Sep 29... ELEC2200-002 Lecture 4 25 Gate Drain Source Gate Drain Source NMOSFETPMOSFET Short or Open Short or Open VGS VGS = 0, open VGS = high, short VGS = 0, short VGS = high, open Reference: R. C. Jaeger and T. N. Blalock, Microelectronic Circuit Design, Third Edition, McGraw Hill.

26. NMOSFET NOT Gate (Early Design) Fall 2014, Sep 29... ELEC2200-002 Lecture 4 26 Ground = 0 volt Power supply VDD volts w.r.t. ground A A Problem: When A = 1, current leakage causes power dissipation. Solution: Complementary MOS design proposed by F. M. Wanlass and C.-T. Sah, “Nanowatt Logic Using Field- Effect Metal-Oxide Semiconductor Triodes,” International Solid State Circuits Conference Digest of Technical Papers, Feb 20, 1963, pp. 32-33. A: Boolean variable A = VDD volts; 1, true, on A = 0 volt; 0, false, off

27. CMOS Circuit Fall 2014, Sep 29... ELEC2200-002 Lecture 4 27 Wanlass, F. M. "Low Stand-By Power Complementary Field Effect Circuitry.“ U. S. Patent 3,356,858 (Filed June 18, 1963. Issued December 5, 1967).

28. CMOS NOT Gate (Modern Design) Fall 2014, Sep 29... ELEC2200-002 Lecture 4 28 VDD = 1 volt; voltage depends on technology. Ground A A A = VDD = 1 volt is state “1” A = GND = 0 volt is state “0” Power supply GND Truth Table AA 01 10 AA Electrical Circuit Symbol Boolean Function

29. CMOS Logic Gate: NAND Fall 2014, Sep 29... ELEC2200-002 Lecture 4 29 VDD AF GND Truth Table ABF 001 011 101 110 A B B F Electrical Circuit Boolean Function Symbol

30. CMOS Logic Gate: NOR Fall 2014, Sep 29... ELEC2200-002 Lecture 4 30 VDD A F GND Truth Table ABF 001 010 100 110 A B B F Electrical Circuit Boolean Function Symbol

31. CMOS Logic Gate: AND Fall 2014, Sep 29... ELEC2200-002 Lecture 4 31 Truth Table ABF 000 010 100 111 A B F Boolean Function Symbol A B F F ≡

32. CMOS Logic Gate: OR Fall 2014, Sep 29... ELEC2200-002 Lecture 4 32 Truth Table ABF 000 011 101 111 F Boolean Function Symbol F F ≡ A B A B

33. CMOS Gates Logic function Number of transistors 1 or 2 inputsN inputs NOT2- AND62N + 2 OR62N + 2 NAND42N NOR42N Fall 2014, Sep 29... ELEC2200-002 Lecture 4 33

34. Optimized Ignition Logic Fall 2014, Sep 29... ELEC2200-002 Lecture 4 34 M =K (P + B S) =KP + KBS K P KP S B KBS M 3 gates, 20 transistors. Can we reduce transistors?

35. Further Optimization Fall 2014, Sep 29... ELEC2200-002 Lecture 4 35 M =K (P + B S) = KP + KBS(Distr. law) =KP + KBS(Theorem 3, involution) =KP · KBS(De Morgan’s theorem) K P KP S B KBS M 3 gates, 14 transistors. NAND gates 4+6 transistors

36. Binary Arithmetic Switching Theory Semiconductor Technology Digital Systems Fall 2014, Sep 29...ELEC2200-002 Lecture 436 Boolean Algebra DIGITAL CIRCUITS

37. Digital Logic Design Representation of switching function: Truth table Canonical forms Karnaugh map Logic minimization: Minimize number of literals. Technology mapping: Implement logic function using predesigned gates or building blocks from a technology library. Fall 2014, Sep 29... ELEC2200-002 Lecture 4 37

38. Truth Table Truth table is an exhaustive description of a switching function. Contains 2 n input combinations for n variables. A,B,C) = A B +  A C + A  C Example: f(A,B,C) = A B +  A C + A  C Fall 2014, Sep 29... ELEC2200-002 Lecture 4 38 n Input variables, n = 3Output ABCf(A,B,C) 0000 0011 0100 0111 1001 1010 1101 1111 2 n = 8 rows

39. How Many Switching Functions? Output column of truth table has length 2 n for n input variables. It can be arranged in ways for n variables. Example: n = 1, single variable. Fall 2014, Sep 29... ELEC2200-002 Lecture 4 39 InputOutput functions AF1(A)F2(A)F3(A)F4(A) 00011 10101

40. Definitions Boolean variable: A variable denoted by a symbol; can assume a value 0 or 1. Literal: Symbol for a variable or its complement. Product or product term: A set of literals, ANDed together. Example, a b  c. Cube: Same as a product term. Sum: A set of literals, Ored together. Example, a + b +  c. Fall 2014, Sep 29... ELEC2200-002 Lecture 4 40

41. More Definitions SOP (sum of products): A Boolean function expressed as a sum of products. A,B,C) = A B +  A C + A  C Example: f(A,B,C) = A B +  A C + A  C POS (product of sums): A Boolean function expressed as a product of sums. Example: f(A,B,C) = (  A +  B +  C) (  A + B +  C) ( A +  B + C) Fall 2014, Sep 29... ELEC2200-002 Lecture 4 41

42. Minterm A product term in which each variable is present either in true or in complement form. For n variables, there are 2 n unique minterms. Fall 2014, Sep 29... ELEC2200-002 Lecture 4 42 MintermProduct m0m0  A  B  C m1m1  A  B C m2m2  A B  C m3m3  A B C m4m4 A  B  C m5m5 A  B C m6m6 A B  C m7m7 A B C

43. Minterms are Canonical Functions Fall 2014, Sep 29... ELEC2200-002 Lecture 4 43 000001010011100101110111 Input Value of minterm 1010 m0m0 m1m1 m2m2 m3m3 m4m4 m5m5 m6m6 m7m7

44. Canonical SOP Form a.k.a. Disjunctive Normal Form (DNF) A Boolean function expressed as a sum of minterms. A,B,C) = A B +  A C + A  C Example: f(A,B,C) = A B +  A C + A  C =  A  BC +  ABC + A  B  C + AB  C + ABC =  A  BC +  ABC + A  B  C + AB  C + ABC = m 1 +m 3 +m 4 +m 6 +m 7 =  m(1, 3, 4, 6, 7) = m 1 +m 3 +m 4 +m 6 +m 7 =  m(1, 3, 4, 6, 7) Fall 2014, Sep 29... ELEC2200-002 Lecture 4 44 Row No.ABCf(A,B,C) 00000 10011 20100 30111 41001 51010 61101 71111 Truth table with row numbers

45. Maxterm A summation term in which each variable is present either in true or in complement form. For n variables, there are 2 n unique maxterms. Fall 2014, Sep 29... ELEC2200-002 Lecture 4 45 MaxtermSum M0M0 A + B + C M1M1 A + B +  C M2M2 A +  B + C M3M3 A +  B +  C M4M4  A + B + C M5M5  A + B +  C M6M6  A +  B + C M7M7  A +  B +  C

46. Canonical POS Form a.k.a. Conjunctive Normal Form (CNF) A Boolean function expressed as a product of maxterms. A,B,C) = A B +  A C + A  C Example: f(A,B,C) = A B +  A C + A  C = (A + B + C)(A +  B + C)(  A + B +  C) = (A + B + C)(A +  B + C)(  A + B +  C) = M 0 M 2 M 5 =  M(0, 2, 5) = M 0 M 2 M 5 =  M(0, 2, 5) Fall 2014, Sep 29... ELEC2200-002 Lecture 4 46 Row No.ABCf(A,B,C) 00000 10011 20100 30111 41001 51010 61101 71111 Truth table with row numbers

47. Canonical Forms are Unique A canonical form completely defines a Boolean function. That is, for every input the canonical form specifies the value of the function. To determine canonical form: Construct truth table and sum minterms corresponding to 1 outputs, or multiply maxterms corresponding to 0 outputs. Alternatively, use Shannon’s expansion theorem (see Section 2.2.3, page 101). Two Boolean functions are identical if and only if their canonical forms are identical. Fall 2014, Sep 29... ELEC2200-002 Lecture 4 47

48. Why Generate Canonical Form? Example: Are the following Boolean Functions Identical? Generate canonical forms, e.g., minterms, and compare. Fall 2014, Sep 29... ELEC2200-002 Lecture 4 48

49. Algebraic Procedure Expand each term to contain all variables Remember Postulate 6: Complement Postulate 2: Identity elements a + 0 = a, 0 is identity element for + a · 1 = a, 1 is identity element for dot (·) Fall 2014, Sep 29... ELEC2200-002 Lecture 4 49

50. Fall 2014, Sep 29... ELEC2200-002 Lecture 4 50

51. Karnaugh Map 1952: Edward M. Veitch invented a graphical procedure for digital circuit optimization. 1953: Maurice Karnaugh perfected the map procedure: “The Map Method for Synthesis of Combinational Logic Circuits,” Trans. AIEE, pt I, 72(9):593-599, November 1953. Fall 2014, Sep 29... ELEC2200-002 Lecture 4 51

52. Karnaugh Map: 2 Variables, A, B Fall 2014, Sep 29... ELEC2200-002 Lecture 4 52 A = 0A = 1 B = 0 B = 1 m0m0 m1m1 m2m2 m3m3 m 3 = AB = 11 (numerical interpretation) 00 01 10 11 Unit Hamming distance between adjacent cells Each cell is a minterm

53. Representing a Function Fall 2014, Sep 29... ELEC2200-002 Lecture 4 53 A = 0A = 1 B = 0 B = 1 m0m0 m1m1 m2m2 m3m3 0 1 2 3 Place 1 in cells corresponding to minterms in canonical form. For example, see F = A B + A  B represented on the left. 1 1 Truth Table ABF 000 010 101 111

54. Grouping Adjacent Minterms Fall 2014, Sep 29... ELEC2200-002 Lecture 4 54 A = 0A = 1 B = 0 B = 1 m0m0 m1m1 m2m2 m3m3 0 1 2 3 Adjacent cells differ in one variable, which is eliminated. For example, F = A B + A  B = A(B +  B) = A 1 1 Product term A

55. Karnaugh Map Minimization Canonical SOP form represented on map Example: F = A  B + A B +  A B Find minimal cover (fewest groups of largest sizes), F = A + B Fall 2014, Sep 29... ELEC2200-002 Lecture 4 55 A = 0A = 1 B = 0 B = 1 m0m0 m1m1 m2m2 m3m3 1 1 1 product A product B A B F

56. Karnaugh Map: 3 Variables, A, B, C Fall 2014, Sep 29... ELEC2200-002 Lecture 4 56 0264 1375 A B C 000 001 010 011 110 111 100 101 Check unit Hamming distance between adjacent cells.

57. Synthesizing a Digital Function Start with specification. Create a truth table from specification. Minimize (SOP with fewest literals): Either write canonical SOP Reduce using postulates and theorems Or find largest cubes from Karnaugh map Minimized SOP gives a two-level AND-OR circuit. NAND or NOR circuit for CMOS technology can be found using de Morgan’s theorem. Fall 2014, Sep 29... ELEC2200-002 Lecture 4 57

58. Example: Multiplexer Inputs: A, B, C Output: F Function: F = A, when C = 1 F = B, when C = 0 Fall 2014, Sep 29... ELEC2200-002 Lecture 4 58

59. 3-Input Function: Multiplexer Truth Table rowABCF 00000 10010 20101 30110 41000 51011 61101 71111 Fall 2014, Sep 29... ELEC2200-002 Lecture 4 59 0264 1375 A B C 1 1 1 1 F = A C + B  C A C BCBC ACBACB F

60. Technology Optimization Fall 2014, Sep 29... ELEC2200-002 Lecture 4 60 F = A C + B  C ACBACB F ACBACB F 2 + 6 + 6 + 6 = 20 transistors

61. Optimized Multiplexer Fall 2014, Sep 29... ELEC2200-002 Lecture 4 61 ACBACB F X Y ACBACB F X Y 2 + 4 + 4 + 4 = 14 transistors

62. Karnaugh Map: 4 Variables, A, B, C, D 04128 15139 371511 261410 Fall 2014, Sep 29... ELEC2200-002 Lecture 4 62 Check unit Hamming distance between adjacent cells. A B D C

63. Adjacency of Edge Cells Fall 2014, Sep 29... ELEC2200-002 Lecture 4 63 01320132 8 9 11 10 0 4 12 8 10 14 6 2

64. Reexamine Three Functions from Slide 48 Example: Are the following Boolean Functions Identical? This time generate Karnaugh maps, and compare. Fall 2014, Sep 29... ELEC2200-002 Lecture 4 64

65. Karnaugh Map of F1 04128 15139 371511 261410 Fall 2014, Sep 29... ELEC2200-002 Lecture 4 65. A B D C F1 = Σm(5, 7, 11, 13, 15) 1 1 11

66. Karnaugh Map of F2 04128 15139 371511 261410 Fall 2014, Sep 29... ELEC2200-002 Lecture 4 66. A B D C F2 = Σm(5, 7, 11, 13, 15) ⇒ F1 and F2 cover same area on map. 1 1111111111

67. Karnaugh Map of F3 04128 15139 371511 261410 Fall 2014, Sep 29... ELEC2200-002 Lecture 4 67. A B D C F3 = Σm(5, 7, 11, 13, 15) ⇒ F1, F2 and F3 cover exactly the same area on map, hence, they are identical. 1 11 1

68. Ignition Function MintermKPBSM 000000 100010 200100 300110 401000 501010 601100 701110 810000 910010 1010100 1110111 1211001 1311011 1411101 1511111 Fall 2014, Sep 29... ELEC2200-002 Lecture 4 68 M = K AND (P OR B) AND (S OR P) = K(P + B)(S + P)

69. Karnaugh Map: M(K, P, B, S) 04128 15139 371511 261410 Fall 2014, Sep 29... ELEC2200-002 Lecture 4 69. K P S B 1

70. Karnaugh Map: Minimum Cover 04128 15139 371511 261410 Fall 2014, Sep 29... ELEC2200-002 Lecture 4 70. K P S B 1 KP KBS

71. Minimized Function Fall 2014, Sep 29... ELEC2200-002 Lecture 4 71 M = KP + KBS KPBSKPBS M

72. Using Inverting Gates Because They Need Fewer Transistors Fall 2014, Sep 29... ELEC2200-002 Lecture 4 72 M =KP + KBS =KP · KBSUsing de Morgan’s Theorem KPBSKPBS M

73. Karnaugh Map on the Web Fall 2014, Sep 29... ELEC2200-002 Lecture 4 73 http://www.ee.calpoly.edu/media/uploads/resources/KarnaughExplorer_1.html

74. Minterm Clusters, Cubes or Products 0 1 4128 15 1 13 1 9 3715 1 11 1 2614 1 10 1 Fall 2014, Sep 29... ELEC2200-002 Lecture 4 74 Larger clusters are products with fewer variables. A B D C

75. Product Fall 2014, Sep 29... ELEC2200-002 Lecture 4 75 More variables in a product mean more transistors (hardware). ABCDABCD P1 ABCDABCD GROUND VDD = 1 volt PMOS transistors NMOS transistors Signals are voltages w.r.t. GROUND A = 0 or 1 volt B = 0 or 1 volt C = 0 or 1 volt D = 0 or 1 volt P1 = 0 or 1 volt

76. Product Fall 2014, Sep 29... ELEC2200-002 Lecture 4 76 Fewer variables in a product mean fewer transistors (hardware). ACAC P2 ACAC GROUND VDD = 1 volt Signals are voltages w.r.t. GROUND A = 0 or 1 volt B = 0 or 1 volt C = 0 or 1 volt D = 0 or 1 volt P1 = 0 or 1 volt

77. Observations A larger minterm cluster is a product with fewer variables; requires fewer transistors. Each gate input needs two transistors. Smaller number of clusters is more efficient: Fewer gates to generate products. Fewer inputs for the OR gate to produce the function. Direct minterm implementation is most inefficient. Fall 2014, Sep 29... ELEC2200-002 Lecture 4 77