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CHAPTER 2 Logic Circuits

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Chapter Objectives In this chapter you will be introduced to: Logic functions and circuits Boolean algebra for dealing with logic circuits Logic gates and synthesis of simple circuits CAD tools and the VHDL hardware description language

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x1=x0= (a) Two states of a switch S x (b) Symbol for a switch Binary Switch

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(a) Simple connection to a battery S (b) Using a ground connection as the return path Battery Light Power supply S Light x x Light Controlled by a Switch

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(a) The logical AND function (series connection) S Power supply S S Power supplyS (b) The logical OR function (parallel connection) Light x1x1 x2x2 x1x1 x2x2 AND and OR Logic Functions

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S Power supplyS Light S X1X1 X2X2 X3X3 Series-Parallel Connection

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S Light Power supply R x Inverting Circuit

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Truth Table for Two Input Variables

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Truth Table for Three Input Variables

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x 1 x 2 x 1 x 2 + x 1 x 2 x 1 x 2 (a) AND gate (b) OR gate x x (c) NOT gate The Basic Gates

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Inverter (NOT Circuit) Performs a basic logic function called inversion or complementation Changes one logic level (HIGH / LOW) to the opposite logic level In terms of bits, it changes a ‘1’ to a ‘0’ and vice versa INPUT OUTPUT AA’ 01 10

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The AND Gate Composed of two or more inputs and a single output Performs logical multiplication. The logical operation of the AND gate is such that the output is HIGH (1) when all the inputs are HIGH, otherwise it is LOW (0)

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The OR Gate Composed of two or more inputs and a single output Performs logical addition The logical operation of the OR gate is such that the output is HIGH (1) when any of the inputs are HIGH, otherwise it is LOW (0)

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X = AB + A

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x 1 x 2 x 3 fx 1 x 2 + x 3 = What is the Truth Table?

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x 1 x f 0001 1101 0011 0101 (a) Network that implements fx 1 x 1 x 2 += A B x 1 x 2 A B f Time (c) Timing diagram x 1 x 2 fx 1 x 2,() (b) Truth table A B Logic Network Example

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Boolean Algebra A mathematical system for formulating logical statements with symbols so that problems can be solved in a manner similar to ordinary algebra. Boolean algebra is the mathematics of digital systems.

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Axioms of Boolean Algebra

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Commutative Laws of Boolean Algebra The commutative law of addition for two variables is algebraically expressed as: x + y = y + x The commutative law of multiplication for two variables is expressed as: xy = yx In summary, the order in which the variables are ORed or ANDed make no difference.

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Associative Laws of Boolean Algebra The associative law of addition of three variables is expressed as: x + (y + z) = (x + y) + z The associative law of multiplication of three variables is expressed as: x(yz) = (xy)z In summary, ORing or ANDing a grouping of variables produces the same result regardless of the grouping of the variables.

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Distributive Law of Boolean Algebra The distributive law of three variables is expressed as follows: x (y+z) = xy + xz This law states that ORing several variables and ANDing the result is equivalent of ANDing the single variable with each of the variables in the grouping, then ORing the result.

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Single Variable Theorems Rule NumberBoolean Expression 5 a. x * 0 = 0 5 b. x + 1 = 1 6 a. x * 1= x 6 b. x + 0 = x 7 a. x * x = x 7 b. x + x = x 8 a. x * x’ =0 8 b. x + x’ =1 9. (x’)’ = x

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Duality To reflect the principle of duality, the axioms and single-variable theorems are listed in pairs. For example, see 5a and 3a. When x =0, by 5a, the result is 0. When x =1, by 5a, the result is 0, which is also proved by 3a.

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Two- and Three-Variable Properties PropertyBoolean Expression 10 a. Commutative 10 b. Commutative x * y = y *x x + y = y + x 11 a. Associative 11 b. Associative x * (y * z) = (x * y) * z x + (y + z) = (x + y) + z 12 a. Distributive 12 b. Distributive x * (y + z) = x * y + x * z x + (y * z) = (x + y) * (x + z) 13 a. Absorption 13 b. Absorption x + x * y = x x * ( x + y) = x

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Two- and Three-Variable Properties PropertyBoolean Expression 14 a. Combining 14 b. Combining x * y + x * y’= x (x + y ) * ( x + y’) = x 15 a. DeMorgan ’ s Theorem 15 b. DeMorgan ’ s Theorem (x * y)’= (x’+ y’) (x + y)’= x’ * y’ 16 a. 16 b. x + x’ * y = x + y x * (x’ + y) = x * y 17 a. Consensus 17 b. Consensus x * y + x’ * z + y * z = x * y + x’ * z (x + y ) * (x’ + z) * (y + z ) = (x + y) * (x’+ z)

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Boolean Simplification Example 1: F = AB’ + C’D + AB’ + C’D = AB’ + C’D (by identity 5) Example 2: F = ABC + ABC’ + A’C = AB(C + C’) + A’C (by identity 13) = AB(1) + A’C (by identity 7) = AB +A’C (by identity 4)

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Logic Circuit Implementation

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DeMorgan’s Theorem (A B)’ = A’ + B’(1) That is, the complement of the product is equivalent to the sum of the complements. This is true for any number of variables. (A B C … Z)’ = A’ + B’ + C’ + … + Z’ (A + B)’ = A’ B’(2) Similarly, the complement of the sum is equivalent to the product of the complements. Similarly, (A + B + C + …+ Z)’ = A’ * B’ * C’ * … * Z’

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Proof of DeMorgan’s Theorem

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Methods to Complement a Function Interchange 1’s and 0’s for the values of F in the truth table Use DeMorgan’s theorem on algebraic function Change F to F’, and F’ to F Change OR to AND Change AND to OR Complement each individual variable Example 1: F = AB+ C’D + B’D Applying DeMorgan’s theorem, F’ = (A’ + B’)(C + D’)(B + D’)

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Methods to Complement a Function Example 2: Simplify F = (x 1 + x 3 ). (x 1 ’+ x 3 ’) F = x 1 x 1 ’+ x 1 x 3 ’ + x 3 x 1 ’+ x 3 x 3 ’ (Distributive Property) x 1 x 1 ’ and x 3 x 3 ’ = 0 ( Identity 8) F = x 1 x 3 ’ + x 1 ’ x 3 Example 3: F = x’yz + x’yz’ +xz = x’y(z + z’ ) + xz (Factoring out) = x’y.1 + xz ( By Identity 6) = x’y + xz ( By Identity 4)

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Practice Problems Find the complement: (xyz)’ Expand: x + yz Simplify: x’y’ +x’y + xy x’y’ + xz + xy + yz’ wy + w’yz’ + wxy + w’xy’

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Venn Diagram Representation x xx (a) Constant 1(b) Constant 0 (c) Variable x (d) x x

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Venn Diagram Representation xy z x xyxy (e)(f) (g) (h) xy xy+ xyz+ xy y

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Verification of the Distributive Property xy z xy z xy z xy z xy z xy z x xy xy x+z xyz+ (a) (d) (c)(f) xz yz+ (b) (e)

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Verify xy + x’z + yz = xy + x’z xy z yx z xy z xy yz xy x+z xz xy z xy xy x+zyz + xy z x z y z x y z x

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Boolean Functions Example 1: Prove: (A + B) (A’ + B’) = AB’ + A’B LHS = AA’ + AB’ + BA’ + BB’ (by distributive property) = O + AB’ + BA’ + O = AB’ + A’B = RHS Example 2: Prove: AC’ + B’ C’ + AC + B’C = A’B’ + AB + AB’ LHS = A(C+C’) + B’(C+C’) = A*1 + B’*1 = A + B’ RHS = A’B’ + AB + AB’ = A’B’ + A(B + B’) = A’ B’ + A = A + B’ (by identity 11) LHS = RHS

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Precedence of Operations NOT, AND, and then OR Example: A*B + A’*B’ 1. Complements 2. AND operations 3. OR operation

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f = m 0 * 1 + m 1 * 1 + m 2 * 0 + m 3 *1 Synthesis Using Gates

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f (a) Canonical sum-of-products f (b) Minimal-cost realization x 2 x 1 x 1 x 2 Two Implementations

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Terms and Definitions Synthesis The designing of a new system that implements a desired functional behavior. Analysis The task of determining the function performed by a system.

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Terms and Definitions Sum-of-Products (SOP) Product-of-Sums (POS) Canonical SOP Canonical POS Minterm A product term with all ‘n’ variables in asserted or negated form. Maxterm The complement of a minterm

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Three-Variable Minterms and Maxterms

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A Three-Variable Function

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Canonical Sum-of-Products f(x 1, x 2, x 3 ) = x 1 ’x 2 ’x 3 + x 1 x 2 ’x 3 ’ + x 1 x 2 ’x 3 + x 1 x 2 x 3 ’ = Σ (m 1, m 4, m 5, m 6 ) = Σ m(1, 4, 5, 6) Canonical Product-of-Sums f’(x 1, x 2, x 3 ) = x 1 ’x 2 ’x 3 ’ + x 1 ’x 2 x 3 ’ + x 1 ’x 2 x 3 + x 1 x 2 x 3 f(x 1, x 2, x 3 ) = (x 1 +x 2 +x 3 )(x 1 +x 2 ’+x 3 )(x 1 +x 2 ’+x 3 ’)(x 1 ’+x 2 ’+x 3 ’) = Π (M0, M2, M3, M7) = Π M(0, 2, 3, 7)

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Practice Problems Show that the minimal Sum-of-Products is: f(x 1, x 2, x 3 ) = x 2 ’x 3 + x 1 x 3 ’ Show that the minimal Product of Sums is: f(x 1, x 2, x 3 ) = (x 1 + x 3 )(x 2 ’ + x 3 ’)

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f (a) A minimal sum-of-products realization x 1 x 2 x 3 (b) A minimal product-of-sums realization f x 2 1 x 3 Minimal Realizations

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More Practice Problems Determine the canonical Sum-of-Products expressions for the following functions: f(x 1, x 2, x 3 ) = Σ m(2, 3, 4, 6, 7) f(x 1, x 2, x 3, x 4 ) = Σ m(3, 7, 9, 12, 13, 14, 15) Now determine the minimized SOPs for these two functions. Find the canonical Product of Sums expression for: f(x 1, x 2, x) = Π M(0, 1, 5)

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Four More Logic Gates NAND NOR Exclusive OR (XOR) Exclusive NOR (XNOR)

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The NAND Gate The NAND, which is composed of two or more inputs and a single output, is a very popular logic element because it may be used as a universal function. It may be employed to construct an inverter, an AND gate, an OR gate, or any combination of these functions. The term NAND is formed by the concatenation NOT-AND and implies an AND function with an inverted output. The logical operation of the NAND gate is such that the output is LOW (0) only when all the inputs are HIGH (1).

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The NOR gate The NOR gate, which is composed of two or more inputs and a single output, also has a universal property. The term NOR is formed by the concatenation NOT-OR and implies an OR function with an inverted output. The logical operation of the NOR gate is such that the output is HIGH (1) only when all the inputs are LOW.

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The Exclusive-OR (XOR) and Exclusive NOR (XNOR) Gates These gates are usually formed from the combination of the other logic gates already discussed. Because of their functional importance, these gates are treated as basic gates with their own unique symbols. The Exclusive-OR is an "inequality" function and the output is HIGH (1) when the inputs are not equal to each other. The Exclusive-NOR is an "equality" function and the output is HIGH (0) when the inputs are equal to each other.

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NAND and NOR Gates

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DeMorgan’s Theorem in Terms of Logic Gates

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Using NAND Gates to Implement a Sum-of-Products

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Using NOR Gates to Implement a Product-of-Sums

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x1x1 f (a) POS implementation (b) NOR implementation f x3x3 x2x2 x1x1 x3x3 x2x2 NOR Gate Realization of an Example Function

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f f (a) SOP implementation (b) NAND implementation x1x1 x3x3 x2x2 x3x3 x2x2 x1x1 NAND Gate Realization of an Example Function

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Truth Table for a Three-Way Light Control

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SOP and POS Realizations

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Implementation of a Multiplexer (a)Truthtable sx1x1 x2x2 f (s, x 1, x 2 ) f x 1 x 2 s (b) Circuit f s x 1 x (c) Graphical symbol 0 1 (d)Morecompacttruth-tablerepresentation f (s, x 1, x 2 ) s x1x1 x2x2

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A Typical CAD System See Figure 2.29, page 61, in your textbook.

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f x 3 x 1 x 2 A Simple Logic Function

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VHDL VHSIC Hardware Description Language Very High Speed Integrated Circuit Entity Declaration Describes Ports Input Output Architecture Declaration Describes Functions

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ENTITY example1 IS PORT ( x1, x2, x3 : IN BIT ; f : OUT BIT ) ; END example1 ; VHDL Entity Declaration

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ARCHITECTURE LogicFunc OF example1 IS BEGIN f <= (x1 AND x2) OR (NOT x2 AND x3) ; END LogicFunc ; VHDL Architecture for the Entity

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Complete VHDL Code for the Circuit

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VHDL Code for a Four-Input Function

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Logic Circuit for the VHDL Code

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Example 2.10 A circuit that controls a given digital system has three inputs: x 1, x 2, and x 3. It has to recognize three different conditions: Condition A is true if x 3 is true and either x 1 is true or x 2 is false. Condition B is true if x 1 is true and either x 2 or x 3 is false. Condition C is true if x 2 is true and either x 1 is true or x 3 is false. The control circuit must produce an output of 1 if at least two of the conditions A, B, and C are true. Design the simplest circuit that can be used for this purpose.

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Solution to Example 2.10 Using 1 for true and 0 for false, express the three conditions A, B, and C as: A = x 3 (x 1 + x 2 ’) = x 3 x 1 + x 3 x 2 ’ B = x 1 (x 2 ’ + x 3 ’) = x 1 x 2 ’ + x 1 x 3 ’ C = x 2 (x 1 + x 3 ’) = x 2 x 1 + x 2 x 3 ‘ The desired output can be expressed as: f(x 1, x 2, x 3 ) = AB + AC + BC

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Solution to Example 2.10 Determine the product term AB: = (x 3 x 1 + x 3 x 2 ’)(x 1 x 2 ’ + x 1 x 3 ’) = x 3 x 1 x 1 x 2 ’ + x 3 x 1 x 1 x 3 ’ + x 3 x 2 ’x 1 x 2 ’ + x 3 x 2 ’x 1 x 3 ’ = x 3 x 1 x 2 ’ + O + x 3 x 2 ’x 1 + O = x 1 x 2 ’x 3 Determine the product term AC = x 1 x 2 x 3 Determine the product term BC = x 1 x 2 x 3 ’

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Solution to Example 2.10 f(x 1, x 2, x 3 ) = AB + AC + BC = x 1 x 2 ’x 3 + x 1 x 2 x 3 + x 1 x 2 x 3 ’ = x 1 (x 2 ’ + x 2 )x 3 + x 1 x 2 (x 3 + x 3 ’) = x 1 x 3 + x 1 x 2 =x 1 (x 3 + x 2 )

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Example 2.11 Solve Example 2.10 using Venn Diagrams

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(a) FunctionA (b) FunctionB (c) FunctionC (d) Functionf x1x1 x3x3 x2x2 x1x1 x2x2 x1x1 x2x2 x1x1 x2x2 x3x3 x3x3 x3x3 Solution to Example 2.11

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