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CS 3402:A.Berrached1 Chapter 2: Boolean Algebra and Logic Functions CS 3402-- Digital Logic Design.

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Presentation on theme: "CS 3402:A.Berrached1 Chapter 2: Boolean Algebra and Logic Functions CS 3402-- Digital Logic Design."— Presentation transcript:

1 CS 3402:A.Berrached1 Chapter 2: Boolean Algebra and Logic Functions CS 3402-- Digital Logic Design

2 CS 3402:A.Berrached2 Boolean Algebra Algebraic structure consisting of: a set of elements B operations {AND, OR} n Notation: X AND YX Y XY X OR Y X+Y B contains at least two elements a & b such that a  b n Note: switching algebra is a subset of Boolean algebra where B={0, 1} Axioms of Boolean Algebra 1. Closure a,b in B, (i) a + b in B (ii) a b in B 2. Identities: 0, 1 in B (i) a + 0 = a (ii) a 1 = a 3. Commutative Laws: a,b in B, (i) a + b = b + a (ii) a b = b a 4. Associative Laws: (i) a + (b+c) = (a+b)+c = a+b+c (ii) a. (b.c) = (a.b).c = a.b.c 5. Distributive Laws: (i) a + (b c) = (a + b) (a + c) (ii) a (b + c) = (a b) + (a c) 6. Existence of the Complement: exists a’ unique in B (i) a + a’ = 1 (ii) a a’ = 0 a’ is complement of a

3 CS 3402:A.Berrached3 Principle of Duality Definition of duality: n a dual of a Boolean expression is derived by replacing AND operations by ORs, OR operations by ANDs, constant 0s by 1s, and 1s by 0s (everything else is left unchanged). Principle of duality: if a statement is true for an expression, then it is also true for the dual of the expression Example: find the dual of the following equalities 1)XY+Z = 0 2)a(b+c) = ab + ac

4 CS 3402:A.Berrached4 Boolean Functions n A Boolean function consists of an algebraic expression formed with binary variables, the constants 0 and 1, the logic operation symbols, parenthesis, and an equal sign. n Example: F(X,Y,Z) = X + Y’ Zor F = X + Y’ Z n X, Y and Z are Boolean variables n A literal: The appearance of a variable or its complement in a Boolean expression n A Boolean function can be represented with a truth table n A Boolean function can be represented with a logic circuit diagram composed of logic gates.

5 CS 3402:A.Berrached5 More than one way to map an expression to gates E.g., Z = A' B' (C + D) = (A' (B' (C + D))) From Boolean Expression to Gates A B C D T 2 T 1 Z Z A B C D For each Boolean function, there is only one unique truth table representation =>Truth table is the unique signature of a Boolean function

6 CS 3402:A.Berrached6 Boolean Functions Possible Boolean Functions of Two variables NAND NOR Description Z = 1 ifX is 0 orY is 0 GatesTruth Table X 0 0 1 1 Y 0 1 0 1 Z 1 1 1 0 X Y Z Description Z= 1 if bothX andYare 0 GatesTruth Table X Y Z X 0 0 1 1 Y 0 1 0 1 Z 1 0 0 0

7 CS 3402:A.Berrached7 Basic Logic Functions: NAND, NOR n NAND, NOR gates far outnumber AND, OR in typical designs easier to construct in the underlying transistor technologies they are functionally complete n Functionally Complete Operation Set: A set of logic operations from which any Boolean function can be realized (also called universal operation set) E.g. {AND, OR, NOT} is functionally complete n The NAND operation is also functionally complete => any Boolean function can be realized with one type of gate (the NAND gate). n The NOR operation is also functionally complete

8 CS 3402:A.Berrached8 Basic Logic Functions: XOR, XNOR n XOR: X or Y but not both ("inequality", "difference") n XNOR: X and Y are the same ("equality", "coincidence")

9 CS 3402:A.Berrached9 Logic Functions: Rationale for Simplification n Logic Minimization: reduce complexity of the gate level implementation reduce number of literals (gate inputs, circuit inputs) reduce number of gates reduce number of levels of gates n fewer inputs implies faster gates in some technologies n fan-ins (number of gate inputs) are limited in some technologies n Fewer circuit inputs implies fewer I/O pins n fewer levels of gates implies reduced signal propagation delays n number of gates (or gate packages) influences manufacturing costs n In general, need to make tradeoff between circuit delay and reduced gate count.

10 CS 3402:A.Berrached10 Simplification Using Boolean Algebra Useful Theorems of Boolean Algebra: 1. Idempotency Theorem a. X + X = Xb. X X = X 2. Null elements for + and operators a. X + 1 = 1b. X. 0 = 0 3. Involution Theorem (X’)’ = X 4. Absorption Theorem a. X + XY = Xb. X.(X+Y) = X 5. Simplification Theorem a. XY + XY’ = Xb. (X+Y).(X+Y’) = X 6. Another Simplification Theorem a. X + X’Y = X + Y b. X.(X’ + Y) = X.Y

11 CS 3402:A.Berrached11 DeMorgan's Theorems 7. DeMorgan’s Theorem a. (X+Y)’ = X’. Y’ b. (X.Y)’ = X’ + Y’ n The complement of the sum is the product of the complements n The complement of the product is the sum of the complements In general a. (A+B+….+Z)’ = A’. B’. ….Z’ b. (A.B.C….Z)’ = A’ + B’ + ….+Z’

12 CS 3402:A.Berrached12 DeMorgan's Theorem (X + Y)' = X' Y' (X Y)' = X' + Y' NOR is equivalent to AND with inputs complemented NAND is equivalent to OR with inputs complemented DeMorgan’s Law can be used to get the complement of an expression {F(X1,X2,...,Xn,0,1,+,)}' = {F(X1',X2',...,Xn',1,0,,+)} Example: F = A B' C' + A' B' C + A B' C + A B C' F' = (A' + B + C) (A + B + C') (A' + B + C') (A' + B' + C)

13 CS 3402:A.Berrached13 n Truth Table (Unique representation) n Boolean Expressions n Logic Diagrams FromTO Boolean Expression ==>Logic Diagram Logic Diagram ==>Boolean Expression Boolean Expression ==>Truth Table Truth Table ==>Boolean Expression Function Representations

14 CS 3402:A.Berrached14 Function Representations n F(X,Y,Z) = X + Y’Z + X’Y’Z + X’Y’Z’

15 CS 3402:A.Berrached15 Deriving Boolean Expression from Truth Table

16 CS 3402:A.Berrached16 Definitions: n Literal: A boolean variable or its complement XX’AB’ n Product term: A literal or the logical product (AND) of multiple literals: XXYXYZX’YZ’ A’BC Note: X(YZ)' n Sum term: A literal or the logical sum (OR) of multiple literals: XX’+YX+Y+ZX’+Y+Z’ A’+B+C Note: X+(Y+Z)' Product and Sum Terms --Definitions

17 CS 3402:A.Berrached17 SOP & POS -- Definitions n Sum of products (SOP) expression: The logic sum (OR) of multiple product terms: AB + A’C + B’ + ABC AB’C + B’D’ + A’CD’ n Product of sums (POS) expression: The logic product (AND) of multiple sum terms: (A+B).( A’+C).B’.( A+B+C) (A’ + B + C).( C’ + D) Note: SOP expressions ==> 2-level AND-OR circuit POS expressions ==> 2-level OR-AND circuit

18 CS 3402:A.Berrached18 Minterms & Maxterms -- Definitions Definitions n A Minterm: for an n variable function, a minterm is a product term that contains each of the n variables exactly one time in complemented or uncomplemented form. Example: if X, Y and Z are the input variables, the minterms are: X’Y’Z’ X’Y’Z X’YZ’ X’YZ XY’Z’ XY’Z XYZ’ XYZ n A Maxterm: for an n variable function, a maxterm is a sum term that contains each of the n variables exactly one time in complemented or uncomplemented form Example: if X, Y and Z are the input variables, the maxterms are: X’+Y’+Z’ X’+Y’+Z X’+Y+Z’ X’+Y+Z X+Y’+Z’ X+Y’+Z X+Y+Z’ X+Y+Z

19 CS 3402:A.Berrached19 Minterms n For functions of three variables: X, Y, and Z The bit combination associated with each minterm is the only bit combination for which the minterm is equal to1. Example: X'Y'Z' = 1 iff X=0, Y=0, and Z=0 Each bit represents one of the variables ( order is important) : Un-complemented variable ==> 1 Complemented variable ==> 0

20 CS 3402:A.Berrached20 Maxterms The bit combination associated with each Maxterm is the only bit combination for which the Maxterm is equal to 0. Note: The i th Maxterm is the complement of the i th minterm; That is M i = m i

21 CS 3402:A.Berrached21 Standard (Canonical) forms of an expression n A switching function can be represented by several different, but equivalent, algebraic expressions. n The standard form is a unique algebraic representation of each function. Standard SOP: sum of minterm form of a switching function Standard POS: the product of maxterm form ofa switching function n Each switching function has a unique standard SOP and a unique standard POS.

22 CS 3402:A.Berrached22 Deriving Boolean Expression from Truth Table n Input Output Minterm A B C F term designation 0 0 0 1A’B’C’m0 0 0 1 0A’B’Cm1 0 1 0 0A’BC’m2 0 1 1 1A’BCm3 1 0 0 0AB’C’m4 1 0 1 0AB’Cm5 1 1 0 0ABC’m6 1 1 1 0ABCm7 F is 1 iff (A=0 AND B=0 AND C=0) or (A=0 AND B=1 AND C=1) F is 1 iff (A’=1 AND B’=1 AND C’=1) or (A’=1 AND B=1 AND C=1) F is 1 iff A’.B’.C’ = 1 OR A’.B.C= 1 F is 1 iff A’B’C’ + A’BC = 1 => F = A’B’C’ + A’BC => F = m0 + m3 Short-hand notation: F =  m ( 0, 3)

23 CS 3402:A.Berrached23 Sum of minterms form n A Boolean function is equal to the sum of minterms for which the output is one. => the sum of minterms (also called the standard SOP) form Example: F =  m ( 0, 3)

24 CS 3402:A.Berrached24 Deriving Boolean Expression from Truth Table n Input Output Minterm Maxterm A B C F term Designation term Designation 0 0 0 1A’B’C’ m0 A + B + C M0 0 0 1 0A’B’C m1 A + B + C’ M1 0 1 0 0A’BC’ m2 A + B’ + C M2 0 1 1 1A’BC m3 A + B’ + C’ M3 1 0 0 0AB’C’ m4 A’ + B + C M4 1 0 1 0AB’C m5 A ‘ + B + C’ M5 1 1 0 0ABC’ m6 A’ + B’ + C M6 1 1 1 0ABC m7 A’ + B’ + C’ M7 n F is 0 iff (A+B+C’) = 0 AND (A+B’+C)=0 AND (A’+B+C)=0 AND (A’+B+C’) =0 AND (A’+B’+C) = 0 AND (A’+B’+C’) = 0 => F = (A+B+C’). (A+B’+C). (A’+B+C) AND (A’+B+C’). (A’+B’+C). (A’+B’+C’) => F = M1.M2.M4.M5.M6.M7 ==> F =  M(1,2,4,5,6,7)

25 CS 3402:A.Berrached25 Product of Maxterms n A Boolean function is equal to the product of Maxterms for which the output is 0. => the product of Maxterms (also called the standard Product of Sums) form Example:F =  M(1,2,4,5,6,7)

26 CS 3402:A.Berrached26 Examples: Find the truth table for the following switching functions: n F(A,B,C) = ABC’ + AB’C n F(A,B,C) = AB + A’B’ + AC n F(X, Z) = X + Z’ n F(A,B,C,D) = A(B’ + CD’) + A’BC’ For each of the above functions, find their Standard SOP and POS.

27 CS 3402:A.Berrached27 Getting Standard Forms of a Switching Function n F(A,B,C) = AB + A’B’ + AC get standard SOP and POS forms of F Method 1: 1. Derive Truth Table for F 2. Get SOP and POS from truth table Method 2: Use Shannon’s Expansion Theorem

28 CS 3402:A.Berrached28 Shannon’s Expansion Theorem a) f(x 1,x 2,…,x n ) = x 1.f(1,x 2,….,x n ) + x 1.f(0,x 2,…,x n ) b) f(x 1,x 2,…,x n ) = [ x 1 + f(0,x 2,….,x n )]. [ x 1.f(1,x 2,…,x n )]

29 CS 3402:A.Berrached29 Incompletely Specified Functions n The output for certain input combination is not important (I.e. we don't care about it). n Certain input combinations never occur Example: Design a circuit that takes as input a BCD digit and outputs a 1 iff the parity of the input is even. Note: A BCD digit consists of 4 bits

30 CS 3402:A.Berrached30 Incompletely Specified Functions W F X Y Z Block Diagram

31 CS 3402:A.Berrached31 Incompletely Specified Functions n Truth Table F =  m ( 0, 3, 5, 6, 9)+d(10…15) F =  M(1,2,4,7, 8)+ d(10…15)


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