1. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 1 Development of fast electronics for the GRAPES-3 experiment at Ooty K.C. RAVINDRAN On Behalf of GRAPES-3 Collaboration

2. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 2 8 Channel Discriminator 8 Channel Combined Amplifier and discriminator 32 Channel Time to Digital Converter (TDC) 32 Channel High Performance TDC (HPTDC) 4 Fold Logic Unit GENERAL Quad Gated Scaler JTAG protocol in Parallel port FAST Electronics DEVELOPMENT AND PERFORMANCE

3. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 3 Basic elements for each scintillation detector Philips TDC GRAPES TDC Needs JTAG

4. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 4 8 Channel discriminator module development Dual comparator by Analog Devices (AD96687) Characteristics –Propagation delay = 2.5 ns, –Dispersion = 50 ps (for overdrive 100mV - 1V) –ECL outputs –Power dissipation: 118 mW per channel

5. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 5 Performance of discriminator Muon Philips TDC Model- 7186 TDC Resolution- 25ps

6. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 6 Time distribution with muon trigger FWHM=4.9ns

7. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 7 Relative time distribution of 2 channels of GRAPES discriminator

8. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 8 Relative time distribution between Lecroy and GRAPES discriminator

9. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 9

10. 10 SUMMARY The timing error 125 -135 ps with muon trigger –represents combined statistical widths of two separate distributions –Timing error due to intrinsic width of GRAPES discriminator is ~ 100 ps Intrinsic double pulse resolution of GRAPES discriminator is 4 ns Future Upgrade Maxim comparator MAX9693EPE Propagation delay =1.2ns Delay dispersion = 150ps (for overdrive: 10mv-100mv) ECL outputs 350mW per channel Sample IC is being tested, same pin configuration Cost effective & expect better performance

11. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 11 GRAPES Discriminator Module

12. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 12 Development of Fast Amplifiers SpecificationsAD8350-20LMH6626 ManufacturerAnalogNational Bandwidth at Gain=10700 MHz.200 MHz Slew Rate2000V / μs350V / μs Input Impedance200 Ω4.6 kΩ Output Impedance200 Ω10 mΩ

13. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 13 Performance of Combined GRAPES Amplifier & Discriminator Module Muon

14. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 14 Performance: Timing response to Muons σ =3nsσ =3.1ns σ =3ns Philips GRAPES-8350 GRAPES-LMH6626

15. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 15 Intrinsic timing response using Muons σ=128ps σ=178ps Difference distribution Philips & GRAPES-8350 Difference distribution Philips & GRAPES-LMH6626

16. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 16 Summary Fast intrinsic timing response of ~125 ps –Timing response comparable to commercial module Standard NIM Module Highly customized (but still modular) to GRAPES needs – On-board NIM/TTL converter with monoshots – Multiple buffered outputs as per our experimental requirement Highly cost effective No delays in repair Low power consumption –Almost half compared to commercial modules Amplifier and Discriminator in same module –Cost saving on connectors

17. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 17 8-Channel GRAPES LMH6626 Amplifier & Discriminator Module

18. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 18 Time to Digital Converter (TDC) Development  Based on TDC32 ASIC Chip  Developed by Micro Electronics Group of CERN, Geneva  Trigger mode operation  Multi-hit capability  Number of channels: 32 + 1 Common start  Time resolution = 520ps @60MHz  Dynamic range: 21 bits  Double pulse resolution: 15ns

19. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 19 Block Diagram of Calibration Setup Calibration Module 40MHz 32MHz 25MHz 20MHz 16MHz 10MHz Selection of Crystal Number of Samples Interval between samples Max Delay Control Signals from Computer START STOP PHILLIPS TDC Module START Ch. 1 Ch. 2 Ch. 16 FANOUT Module GRAPES TDC Module START Ch. 1 Ch. 2 Ch. 32

20. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 20 Non-linearity of TDC Phillips GRAPES TDC

21. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 21 GRAPES and PHILLIPS TDCs with real data! EAS DATA OF SAME CHANNEL

22. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 22 GRAPES TDC32 Module

23. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 23 Further TDC Upgrade plans TDC32  Resolution depends on clock- max 60 MHz  At 60 MHz 520 ps  86 pin PLCC package  TTL standard  Power: 5 V  127 bits of data in JTAG protocol HPTDC  Basic clock 40 MHz  In built PLL-programable  resolution programmable to 24 ps (8 ch), 98 ps, 195 ps & 781 ps  225 pin BGA package  LVDS & LVTTL  Power: 2.5 V and 3.3 V  ~1K bits of data to program  Highly flexible  programming complexity

24. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 24 Development of Logic Unit Flexible Four fold logic unit –Logic AND/OR operation Low propagation delay(16ns) Multiple NIM outputs with either polarity Provision of Veto Inputs: switch selectable

25. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 25 QUAD gated scalar Four independent, 8 digit channels Maximum input frequency=3 MHz Operation with TTL or NIM inputs Gated timer mode operation Selectable timer 1-9999 s Carry available for cascading the counters

26. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 26 R&D work in progress HPTDC work  PCB ready  225 pin BGA chip mounted & PCB wired - start testing Testing the Amplifier with LMH6703 and integrating with discriminator MAX9693  Amplifier tested in wired board - bandwidth 400 MHz measured at gain 10  Test MAX9693  Design and fabricate PCB and avoid Lemo connectors QDC development in progress

27. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 27 THANKS

28. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 28 PCI Interface card The PC’s which are available now does not have ISA bus support ALS systems manufactures prototyping PCI cards The local address bus, data bus and control signals like read and write are available to user We could read data at 1 µs / word using this card in our DAS A common PCI Interface card designed and wired and used in all our DAS at Grapes-3 This card costs around Rs 5,500/- and the card from Japan PCI-7200 which is a PCI, I/O card costs around Rs 12,000/-

29. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 29

30. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 30 THANKS

31. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 31 CABLE ATTENUATION/100 m

32. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 32

33. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 33 Comparison of power requirement for Phillips and CRL module Power supply Voltage Philips 16 ch Amp 776 Current mA Phillips 16 ch Disc.706 Current mA CRL 8 Ch Amp-Disc Current mA +6320400700 -6320450500 +1215050 -12150165 +24-80 -24-80

34. K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 34 Trigger Rate at Grapes-3 with ~400 scintillation detectors Level-0 ~ 100 Hz Level-1~ 28 Hz Calibration~ 5 Hz Pedestal ~ 1 Hz