Presentation on theme: "Advanced Silicon/Silicon-Germanium"— Presentation transcript:
1Advanced Silicon/Silicon-Germanium UK SiGe Research ProgrammeReview Meeting, 3rd April, 2003Advanced Silicon/Silicon-GermaniumDevice SimulationsJohn Barkerin collaboration withAsen Asenov, Mirela Borici, Scott Roy,Jeremy Watling, Richard Wilkins, Lianfeng YangNanoelectronics Research CentreDepartment of Electronics and Electrical EngineeringUniversity of Glasgow
2OutlineIs silicon near its end?Physics, Modelling and SimulationInterface RoughnessSilicon-Germanium studiesAdvanced Simulation methodologyAdvanced DevicesFully quantum atomistic simulationSummary
31. Is silicon near its end?House of Commons Select Committee(2002)Red brick wall betweenFundamental limit: 2015Theory Limit: nmSuggests: single electronics,magneticand atomic devicescarbon nanotubes, quantum computingand other radical alternatives to CMOSbe pursuedConcentrate on microprocessor designand architecture1978:red brick wall 0.25µm limit,alternatives included magnetic bubble logicconv. & quantum devices based on GaAs and InP!
4Atomic scale MOSFET in the near future ?? We still firmly believe the Si route is the best
5Reality check: Scaling of MOSFETs to decanano dimensions House of LordsThe accelerating road map!
6The accelerating road map! Paradigm shiftMOSFET TechnologyIntel50 nm gates nm gatesRaised Source Drain: power reductionHigh k dielectric: leakage, avoid too thinSOI : kill leakage; better materials:strained Si, SiGe
7Beyond the House of Lords! 2001-2Intel 20 nm transistorIntel 10 nm transistor (2002)
8The IBM 6 nm silicon transistor (IEDM 2002) demonstrated
9Silicon Nanoelectronics Today’s transistors 130 nm to 90 nmTomorrows transistors: still silicon!Projection:a vision down to 4nm-2 nm existscorresponding to a timescaleHuge possibilities: versatile platformfor new and emerging technologiesnew programmesUS,JapanEurope,UK??(width of a Carbon NT)
11System issuesWill need different kinds of transistors in system blocks:Datapaths (speed, leakage)Dedicated DSP (power, leakage)Memory (density is main concern)AnaloguePower and leakage determine the size ratiosbetween these blocksNumber of different transistors types is determined byparameter spreadLess devices could solve the problem, but, needcontrol of the threshold (4th terminal), with strongtransfer function.System solutions: adaptive control, coding, ...
12Future of mainstream electronics Silicon nanoelectronicsDevice design and System design required togetherto solve issues of: power, leakage, fluctuations, stabilitySilicon, strained silicon, silicon-germanium, germaniumIII-V on silicon/germanium good versatile materials technologyALL subscribed to by major industry playersLifetime: beyond 2025THIS IS OUR MOTIVATION FOR BEING IN THE SiGe Project
132. Physics, modelling and simulation Why is simulation useful?Part of the design-optimisation cycleExtraction of circuit parametersCalibration and extension of commercial toolsDevelop device physics and architectureGetting ahead of the game.
14Summary of Progress (2002-2003) - see also posters Simulation toolsDevelopment of a fully bipolar (electrons and holes)2-D Full-Band Monte Carlo device simulator for Si/strained Si/SiGethat includes degeneracy, high doping effects, advanced screening models, quantum potential and interface roughness scattering. Down to 30 nm.Device Physics and new Simulation toolsInvestigation of carrier transport and scattering at interfacesNew non-perturbative models for interface roughness scatteringEffects of degeneracy, high doping, band-gap narrowingAdvanced screening modelsQuantum transport extensions: density gradient, quantum potential, Wigner function, Green functionAtomistic studies: classical , semi-classical and full quantum transportDesign - optimisation with partnersLayer and device design for consortium partnersModelling and scaling study of high linearity MODFETs, based on experimental data from Daimler ChryslerApplications to partners and industrySiGe MODFETs, RF devices, Si, strained Si and SiGe well tempered devices, double gate devices, atomistic devices.Course on Device Modelling2nd-5th July 2002
154. Interface Roughness: new non-perturbative model An extension of semi-classical Boltzmann-Fuchs theory, that is suitable for efficient inclusion within the Monte Carlo framework.Probability of specular or diffuse scattering is chosen according to the carrier k-vector and incident scattering angle. This overcomes one of the major failings of the traditional semi-classical model.The scattering from a rough surface, has strong randomizing effects,resulting in a broad distribution over the emergent angles, while scatteringfrom a smoother interface has a high probability at emergent angles close to specular
16Gaussian auto-covariance Exponential auto-covariance Diffuse scattering, depends on the autocorrelation function considered.Gaussian auto-covarianceExponential auto-covarianceRMS height: 0.5nm Correlation Length: Lc = 3nm
17Polar plot of probability of scattering through a given angle surfaceindiffusespecularP=1.0
18Semi-classical model versus ab-initio quantum calculations
19Ab initio interface scattering:Gaussian wavepacket scattering off a smooth interfaceTimeReal Spacek (Fourier) Space0.0 ps0.02 ps0.05 psInitial Motionof Wave PacketElectron rest mass,V(r) = 0; kx0 = ky0 = 109 m-1; E = 76meV
20Ab initio interface scattering:Gaussian wavepacket scattering off a rough interfaceTimeReal Spacek (Fourier) Space0.0 ps0.02 ps0.05 psInitial Motionof Wave Packetbackscattering&diffuseElectron rest mass,V(r) = 0; kx0 = ky0 = 109 m-1; E = 76meV
214. Silicon-Germanium Studies: 2 examples Simulation of 67nm IBM Relaxed and Strained Si n-MOSFET. Provides test for interface roughness simulationsOptimizations of Si/SiGe 70 nm MODFET for RF and high linearity applications: using Daimler-Chrysler data(part of support for experimental RF and linear systems programme)Other work: see posters
224.1 Simulation of 67nm IBM Relaxed and Strained Si n-MOSFET Comparison between the n-type Strained Si and control Si MOSFETs:67nm effective channel lengthSimilar processing and the samedoping conditionsFor the strained Si MOSFET:20nm strained Si layer thicknessStrained Si on relaxed SiGe(Ge content: 15%)K.Rim, et. al., Symposium on VLSI Technology 2001
23Id-Vg Current Characteristics: Monte Carlo v Experiment
27Id-Vg Current Characteristics for strained Si n-MOSFET
28Study 2: Optimizations of Si/SiGe MODFET for RF and high linearity applications Based on the understanding of a Daimler-Chrysler 70nm Si/SiGe MODFETAim for high RF performance and high linearity:RF: fT=f(gm,Cg, etc); fmax=f(fT, gm,Cgs,Cgd, gds,etc)Linearity: PIP3=4gm/(gm2 RL) High is GoodTrade-off designs between fT and linearityGate-to-channel distanceGate position (Lgs/Lds)Doping in the channel (MODFETs vs. DCFETs)Effects of scaling on RF performance and linearityL. Yang, A. Asenov, M. Boriçi, J. R. Watling, J. R. Barker, S. Roy, K. Elgaid1, I. Thayne, T. Hackbarth
30Calibrations of drift-diffusion simulators Calibrated Id-Vg characteristics of DaimlerChrysler70nm Si/SiGe MODFET
31One example: Effects of the gate-to-channel distance small dis worstfor linearitybut goodfor RFEffects of the gate-to-channel distance d on the linearity (PIP3);the inset is the effect of d on the transconductance gm
32ResultsTrade-off designs for RF performance and linearityGate-to-channel distance d: decreasing d enhances RF, but lowers linearityGate position Lgs/Lds: increasing Lgs/Lds achieves high linearity, but reduces gm and drive current IDDoped channel – leads to good linearity, although gives a decrease for gm and drive current IDScalingimproved RF performanceslightly decreased linearity
335. Development of Advanced Simulation Methodologies SiGe heterostructure FET modelsFull Band Monte Carlo Device & bulk simulation,Poisson-SchrödingerDrift Diffusion, Hydrodynamic, Quantum corrected versionsDensity gradient & space-dependent massWigner equation (2002)Quasi-Classical atomistic simulator(2002) unique to GlasgowFull Non-Equilibrium Green Function simulator (2003)Green function - T-matrix quantum hydrodynamic atomistic simulator (2003) unique to GlasgowGrantsNASAIBMEPSRC(Platform)Ind. partnersNEW
34Possible quantum effects within a MOSFET Quantum transportGateTunnellingB-to-BS-to-DQuantumConfinement
35An Artist’s Impression 6. Advanced DevicesIntel have announced conventional MOSFETs scaled down to 10nm, and IBM have even announced a 6nm channel length.The scaling of this design below 10nm is likely to require intolerably thin gate oxides and unacceptably high channel doping, therefore advocating a departure from the conventional MOSFET concept.One of the most promising new device structures is the double-gate MOSFET, with the possibility of scaling to 10nm and below, where direct source-drain tunnelling will become a real possibility.4 nm Double gate MOSFET:An Artist’s Impression
366.1 Double-Gate MOSFET structure density-gradientClassicalQuantumBased on structure of Z. Ren, R. Venugopal, S. Datta, M. Lundstrom, D. Jovanovic, J. Fossum IEDM Technical Digest pp (2000)
37Source-Drain Tunnelling Classical and Density Gradient Simulations ID-VG characteristics obtained from classical and calibrated DG simulations for double gate MOSFETs with channel lengths of 20nm and 4nm. VD=1V, VG is applied to both gates. The quantum mechanical threshold voltage shift,VT, is illustrated.
38Non-equilibrium Green’s Function Method Equations of motion for Green’s functions:(E-H-Sr) Gr (r,r',E) = d(r-r')(E-H-Sr) G< (r,r',E) = S< Ga (r,r',E)(E-H-Sr) G> (r,r',E) = S> Ga (r,r',E)Sr represents self-energy due toopen boundaries and scatteringSr = U gr (surface) UPoisson’s equation(r,r’) are indices for the matrix equationThese equations are solved only inside the green box.Yet Sch Eqn or the above equations are not being solved for a closed system. The open boundaries in the contacts are included via a self-energy.
39MOSFET Quantum Mechanical Effects: Sub-bands Jovanovich et al (2001)Quantum mechanical DOS (spectral function) data taken at Si-SiO2 interfaceStriations in DOS plots are sub-bands. Spectral shift evident near source barrier. Multiple sub-bands are required for accurate scattering calculations
40Non-equilibrium Green’s Function and low-cost Density Gradient Simulations for double gate structure ID-VG characteristics obtained from Non-equilibrium Green’s function and calibrated DG simulations for double gate MOSFETs with gate lengths ranging from 20nm to 4nm. VD=1V.
416.2 The transition to atomistic devices need more advanced simulation tools4 nm
42Atomistic effects: being studied in depth at Glasgow Discrete nature of chargeDiscrete nature of dopantsLine edge roughnessInterface roughnessAtomic segregationDiscretemany-bodycarrierinteractionsFischettiasenov et al
437. Fully quantum atomistic simulation Barker, Physica (2003)Large systems: self-averagingSmall systems: random micro-configurationsConventional perturbation methods inadequate including NEGFExact non-asymptotic T-matrix partial-wave analysis of hard sphere model for impurities and roughnessopen 3D slab confined open box geometryResults sensitive to configurationNo self-averagingTreat impurity/roughness scattering non-perturbatively
44Random impurity potential: the Kohn and Luttinger ansatz Fourier transformstructurefactorensemble averagestandard GF theory
51Box geometry 25 X 25 X 25 nm :density & current ka=2.5Si300KSD SDstrong diffractioneffects; some multiple scatteringmeandering flowbetween impurities & vortices
52Transmission coefficients and conductance Why do small devices work?Compute conductance using Landauer formulaThermal superposition: Lundstrom pictureResults for devices with < 25 nm geometriesConductance very sensitive to impurity cluster orientationConductance not given by standard GF or BoltzmannFlow between vortices is reversible: quasi-ballisticsuggests flow between impurities and vortices is relaxiveConjecture:actual flow is semi-classical fluid but within arenormalised fluctuation potential landscape.
538. SummaryA new interface roughness scattering model developed:gives good agreement with 67 nm n-channel Si and Strained Si MOSFETs.Design and scaling studies provide useful results for RF and linear devicesA state-of-the-art Monte Carlo simulatorPractical and new ab initio quantum simulation toolsRole of atomicity and fluctuationsAdvanced device studies down to 4 nm scaleSilicon nanoelectronics has a great future-lets not ignore it!