1. ELN5622 Embedded Systems Class 2 Spring, 2003 Kent Orthner korthner@hotmail.com

2.  Course Page –www.ksoa.ca/eln5644/index.html  Other Resources –www.hc11.demon.nlwww.hc11.demon.nl Resources

3. Programming Model & Instruction Set Architecture

4.  The set of instructions that the microprocessor can execute.  Defines registers that a programmer can access –Some registers in the microprocessor are not directly accessible by the programmer Instruction Set Architecture

5.  Fixed vs. variable Length Instructions –68HC11: INX = 0x08 LDX #$C100 = 0xce c1 00  Addressing modes –R1  R2 + #$C100 –R1  R3 + M(R3 + X)  Supported Operands –FMUL/FDIV, INC/DEC Instruction Set Characteristics

6.  Successful architectures have several implementations: –varying clock speeds; –different bus widths; –different cache sizes; –etc. –Ie: 8086 Architecture has not changed greatly through 8088, 80286, 80386, 80486, Pentium, etc … Multiple Implementations

7.  Intended to illustrate algorithms.  Simple to understand  Assignments AccA  #1234 AccB  M(#5678)  Functions Putchar (char) Newchar  getchar () Pseudo-code

8.  Loops While () … Endwhile Repeat … Until () Pseudo-code  Conditionals If () then … Elsif () then … Endif

9.  Describes the microprocessor registers that are accessible by the programmer –Includes information about the register width and the type of data element it may contain –Indicate how the instructions access and manipulate the registers  Some registers are not visible (IR). Programmer’s Model

10.  Local memory bits inside the processor.  Instructions use the registers to accomplish tasks.  Some are general purpose –R0 through R7  Some are function specific. –Program Counter –Stack Pointer –Condition Code Registers

11. Motorola 68HC11 Programmers Model

12.  Accumulator: –8-bit:A, B(ACCA, ACCB) –16-bit:D(ACCD) –Two 8-bit accumulator registers. Each may be a source or destination operand for 8-bit instructions. –Some instructions use D as a single 16-bit accumulator, with A as the most significant Byte. –Examples: ACCA  #$64 ACCB  ACCB + M($0074) ACCD  ACCD + (M:M+1)

13. Motorola 68HC11 Programmers Model  Index Registers: –X, Y(IX, IY) –Two 16-bit registers X & Y used primarily for indexed addressing. –Examples: IX  #$0064 ACCD  M(IX+64):M(IX+65)

14. Motorola 68HC11 Programmers Model  Stack Pointer: –SP –16-bit registers pointing to the next available memory location for a push operation. –Automatically decremented during a push operation, incremented during a pull operation. –Must be initialized before use.

15. Motorola 68HC11 Programmers Model  Program Counter: –PC –16-bit register pointing to the beginning fot he next instruction to be executed. –Automatically incremented after each instruction. –Programmer has no control over, other than branch & jump instructions.

16. Motorola 68HC11 Programmers Model  Condition Code Register: –CCR –4-bit register whose bits are set or reset during arithmetic or other operations. –Used for branch operations. –Bits include: C: Carry V: Two’s complements overflow Z : Zero N : Negative I : Interrupt Mask H : Half-carry X : External Interrupt Mask S : Stop Disable

17. Motorola 68HC11 Programmers Model  Condition Code Register Example ACCA  $#F0 ACCA  ACCA + #$F0 11110000 11100000 C  1 Z  0 N  1 V  0

18.  Immediate Addressing ACCA  #$64  Direct / Extended Addressing –Direct: Addr <= 0xFF –Extended: Addr >= 0x0100 ADDA  M($0064) (Direct) ADDA  M($1234) (Extended) Addressing Modes

19.  Indexed Addressing ACCA  M(IX + 64)  Inherent Addressing ADDA  ACCA + ACCB  Relative Addressing PC  (PC – 15) Addressing Modes

20. Motorola 68HC11 Instruction Types  Load & Store Instructions –8-bit Load/Store –16-bit Load/Store –Stack Push/Pull  Transfer Register Instructions  Decrement & Increment Instructions

21. Motorola 68HC11 Instruction Types  Clear & Set Instructions –CLRA, CLRB, BCLR, BSET  Shift & Rotate Instructions –Logical Shift –Arithmetic Shift –Rotate

22. Motorola 68HC11 Instruction Types  Arithmetic Instructions –Add & Subtract –Decimal Instructions (BCD) –Negating Instructions –Multiplications –Fractional Number Arithmetic –Division

23. Motorola 68HC11 Instruction Types  Logic Instructions –ANDA, ANDB, EORA, ORAA, COM  Data Test Instructions –BITA, BITB, CBA, CMPA, TST, TSTA  Conditional Branch Instructions –Signed & Unsigned Conditional Branches –BMI, BPL, BVS, GLT, BGT, BEQ, BNE  Unconditional Jump & Branch Instructions –JMP, JSR, BSR, RTS BRA, BRN

24. Motorola 68HC11 Instruction Types  Condition Code Register Instructions –CLC, SEC, CLV, CEV, TAP, TPA  Interrupt Instructions –CLI, SEI, RTI, SWI, WAI  Miscellaneous Instructions –NOP, STOP, TEST

25. Assembly Language Overview

26.  Machine Language  Assembly Language  Compiled Languages –C, C++, Pascal,  Interpreted Languages –Perl, TCL, UNIX shells  Higher level Languages –SQL, Etc Language Spectrum

27.  The lowest level of programming languages  Binary encodings of the machine’s instructions  Specific to the microprocessors  Programmers do not write machine language programs (anymore)  Machine language (or machine code) is automatically generated from the assembly or compilation processes Machine Language

28. X  #$1234(Immediate) LDX#$1234 ce 12 34 X  $1234(Direct) LDX$1234 fe 12 34 Machine Language: Example

29.  One-to-one with Machine Language instructions (more or less)  More legible  Basic features: –One instruction per line. –Labels provide names for addresses (usually in first column). –Instructions often start in later columns. –Columns run to end of line. Assembly Language

30.  Assembly languages are unique to each microprocessor.  They are categorized at a much lower level than the High-Level Languages (HLLs)  May not be executed on other computer systems with different microprocessors (unless the microprocessors are designed to be compatible) Assembly Language

31.  Intel 8085, 8086, 80286,…80486  Intel Pentium  Motorola 6800, 6805, and 6809  Motorola 68000, 68020 & 68040  Motorola PowerPC  SUN Sparc processor Assembly Language Examples

32.  When a programmer writes a program in assembly language, a specific assembler must be used to create the object code for that specific microprocessor  The final executable file produced from this process can only be executed on a computer containing that specific type of microprocessor Assembling Process

33.  Major tasks: –generate binary for assembly instructions –translate labels into addresses –handle assembler directives  Generally one-to-one translation.  We are using a cross assembler: –Runs on a PC, but assembles for a 68HC11  The assembler we’re using is an absolute assembler: –All source code must be in one file or group of files assembled together. Assembling Process

34.  Converts from a high level language to machine-executable machine language.  Output format is called “object code”. –Still needs to be linked before it can really be machine code.  Some compilers provide a post-compilation assembly file or list file for debugging. Compilation Process

35.  Numeric Data –Integers –Fixed Point –Floating Point  Boolean Data –TRUE = 0  Character Data –American Standard Code for Information Interchange (ASCII) –Extended Binary Coded Decimal Interchange Code (EBCDIC) –UNICODE (Used extensively by Java) Data Types

36. Programming in Assembly Language

37. Assembly Fields * * This is a Comment! * Label:OPCODE OP1,OP2Comment OPCODE OP1 OPCODEAnother Comment

38. Labels  A-Z a-z 0-9. $ _  Up to 15 characters  1 st character can not be ‘0-9’ or ‘$’  Case sensitive  May end with “:”  May be on a line by itself.  Examples: Test _Test JumpToHere:LDX#$1234 Label1

39. Op-Codes  Processor Instruction or  Assembler Directive (pseudo-op)  Must be preceded by at least one whitespace. JumpToHere:LDX#$1234 JMPJumpToHere

40. Operand Field  Defines the operand for the instruction or directive.  Depends on the instructions.  Determines the addressing mode  Can be expressions to be evaluated by the assembler. JumpToHere:LDX#$1234 + 5 JMPJumpToHere

41. Operand Field: Addressing Modes  Inherent INX  Direct, Extended, Relative LDX $1234  Immediate LDX #$1234  Indexed CLR $1234,X

42. Comments  Complete Line Comments: First chararcter is an asterisk. * * This is a Comment * Kent Orthner, May 22, 2003 *  After the Operand JumpHere:LDX #$1234 + 5 JMP JumpHere Also a Comment

43. Hello World Example * Hello World * Kent Orthner, May 22, 2003 * Definitions OUTSTR: EQU $FFCA Define ‘OUTSTR’ Function EOT: EQU 04 Define ‘EndOfText’ Char PROG: EQU $C000 Define Program Location STACK: EQU $DFFF Define Stack Location

44. Hello World Example * Program ORG PROG Locate program in mem lds #STACK Init stack pointer ldx #HELLO Point to start of message jsr OUTSTR Jump to print subroutine swi Returns to the debugger * String Definition HELLO: FCC /Hello World!/ FCB EOT

45. Assembler Output: Machine Language Addr Value c000 8e df ff ce c004 c0 0a bd ff c008 ca 3f 48 65 c00c 6c 6c 6f 20 c010 57 6f 72 6c c014 64 21 04

46. Assembler Output: List Files Line Addr Code Label Opcode 0001 * Hello World 0002 * Kent Orthner, May 22, 2003 0003 0004 * Definitions 0005 ffca OUTSTR: EQU $FFCA Define ‘OUTSTR’ 0006 0004 EOT: EQU 04 Define ‘EndOfTex 0007 c000 PROG:EQU $C000 Define Program L 0008 dfff STACK: EQU $DFFF Define Stack Lo

47. Assembler Output: List Files Line Addr Code Label Opcode 0009 * Program 0010 c000 ORG PROG Locate program 0011 c000 8e df ff lds #STACK Init stack po 0012 c003 ce c0 0a ldx #HELLO Point to start 0013 c006 bd ff ca jsr OUTSTR Jump to print 0014 c009 3f swi Returns to the 0015 0016 * String Definition 0017 c00a 48 65 6c HELLO: FCC /Hello World!/ 6c 6f 20 57 6f 72 6c 64 21 0018 c016 04 FCB EOT

48. Instructions

49. Assembler Directives

50.  ORG: Set the Program Counter ORG $E000  EQU: Define Constants RAM:EQU $E000  RMB: Reserve Memory Bytes TABLE:RMB 100

51. Assembler Directives  BSZ/ZMB: Block Storage Zeroes ZeroSpace:BSZ 100  FCB: Form Constant Byte CountSpace:FCB 1,2,3,4,5,6  FCC: Form Constant Character String StringSpace:FCC ’Hello World!’

52. Assembler Directives  FDB: Form Double Byte FDB $1234  FILL: Fill Memory AASpace:$aa,100  OPT: Assembler Output Options OPT c,l,cre

53. Assembler Exercise

54. Lab 1: Simple Menu

55.  Purpose: –Program assembly & execution. –Serial Input and Output. –Polling-based timing. –Parallel I/O  Assignment –Menu-based system. –Control something with the Parallel I/O block.

56.  Criteria –Serial output to display menu. –Key entry causes menu change. –2-Level menu –Pressing a key at the second level menu causes an external effect. –Idiot-proof (Doesn’t do anything when a wrong key is pressed.) Lab 1: Simple Menu

57.  Criteria –Serial output to display menu. –Key entry causes menu change. –2-Level menu –Pressing a key at the second level menu causes an external effect. –Idiot-proof (Doesn’t do anything when a wrong key is pressed.) Lab 1: Simple Menu

58.  Use Putchar(), Putstr(), getchar() –We’ll cover how to create them next week.  Suggested program flow: Top:Print Menu Wait for input Go to SubMenu1, submenu2, or top. Submenu1:Print submenu1 wait for input Dosomething1, submenu1, or top. Dosomething1:Do the action. Go to Submenu1 Submenu2:… Lab 1: Simple Menu Implementation Hints