Download presentation

Presentation is loading. Please wait.

1
**of Single-Type-Column 3D silicon detectors**

Device simulation of Single-Type-Column 3D silicon detectors Claudio Piemonte ITC-irst Trento (Italy)

2
**Outline Introduction Single-Type Column 3D detector concept**

Simulation of the static characteristics Simulation of the signal response Conclusion

3
Introduction Development of 3D sensors is being carried out at ITC-irst in collaboration with INFN. Work done so far is described in 3+1 talks: Simulations of 3D-STC detectors Claudio Piemonte (ITC-irst) Technology used in the first two fab. runs Sabina Ronchin Electrical characterization of first prototypes - Nicola Zorzi + Electrical characterization at Glasgow D. Pennicard (Glasgow University)

4
**“Standard” 3D detectors - concept**

Proposed by Parker et al. NIMA395 (1997) n-columns p-columns ionizing particle wafer surface Short distance between electrodes: low full depletion voltage short collection distance more radiation tolerant than planar detectors!! n-type substrate

5
**Single-Type-Column 3D detectors - concept**

[ Presented in June 2004 at the Hiroshima conference ] Sketch of the detector: Functioning: n-columns ionizing particle cross-section between two electrodes n+ electrons are swept away by the transversal field holes drift in the central region and diffuse towards p+ contact p-type substrate grid-like bulk contact

6
**3DSTC detectors - concept (2)**

Main feature: hole etching and doping are performed only once Further simplification: holes not etched all through the wafer p-type substrate n+ electrodes Uniform p+ layer No need of support wafer. Bulk contact is provided by a backside uniform p+ implant single side process.

7
**Structure used for static simulations**

3D simulations are necessary DEVICE3D tool by Silvaco n+ cell 50mm p-type substrate Wafer thickness:300mm Holes: 5mm-radius 250mm-deep Important to exploit the structure symmetries to minimize the region to be simulated

8
**Simulated potential distribution (1)**

Potential distribution (vertical cross-section) 50mm 300mm Potential distribution (horizontal cross-section) in scale not in scale 0V -10V -5V -15V null field lines

9
**Simulated potential distribution (2)**

Potential and Electric field along a cut-line from the electrode to the center of the cell Na=1e13 1/cm3 Na=1e12 1/cm3 Na=5e12 1/cm3 Na=5e12 1/cm3 Na=1e12 1/cm3 Na=1e13 1/cm3 To increase the electric field strength one can act on the substrate doping concentration

10
**Capacitance in 3D-STC 3D diode Cback=CbackTot/100 Cint=CintTot/40**

matrix of 10x10 holes Cback=CbackTot/100 Cint=CintTot/40 guard ring Structure for simulation of Cback Structure for simulation of Cint half pitch oxide not included in the structure Cback=4 x simulated value Cint=2 x simulated value

11
**Capacitance simulations (1)**

Capacitance simulation on a 300μm thick wafer with 150mm deep columns, 80mm picth, Na=5e12cm-3 Phase 1 high Cback ~ zero Cint undepleted Si Phase 1 Phase 2 Phase 2 max Cint slowly dec. Cback undepleted Si

12
**Capacitance simulations (2)**

col-to-back capacitance meas. Comparison between measurements (on 3D diodes) and simulations simul. 300μm thick wafer 190mm deep columns 2e12cm-3 subst. conc. 100mm col. pitch 80mm col. pitch 1/C2 characteristic 80mm col. pitch From 1/C2 curves: full depl. between columns clearly visible (higher for 100mm pitch) diode-like behavior in phase 2 100mm col. pitch

13
**Capacitance simulations (3)**

1) Vbias=0V 2) Vbias=2V 3) Vbias=5V 4) Vbias=20V Do not consider the hot spot in the pictures, it is the charge released by a particle. The 1/C2 curve of the col-to-back capacitance can be used to extract both the intercolumn as well as the col-to-back full depletion. 2 3 4

14
**Signal in 3D-STC detectors (1)**

e h First phase Transversal movement Ramo theorem: 250mm electric field weighting field 50mm 50mm 1 2 3 4 generation 10mm from column 1 2 3 4 generation in the middle between two columns induced by e induced by h induced by e induced by h

15
**Signal in 3D-STC detectors (2)**

Second phase Hole vertical movement hole velocity orthogonal to weighting field no signal induced weighting field no longer orthogonal signal induced 180um from top 140um from top a hole moving towards the back induces a current pulse shifted in time according to the generation depth

16
**Simulation of a localized charge deposition**

Only the transversal movement is visible x 1 3 z 1 2 3 4 80mm electrons (10,10) 250mm y 50mm holes 50mm transv. movem. vert. movem. induced by e induced by h total current The current plot in log-log scale shows very clearly the fast transversal component and the slow hole vertical one.

17
**Simulation of a uniform charge deposition (1)**

2 3 4 Uniform Vertical deposition (10,10) Bias voltage = 50V (> full depl.) All the electrons collected by electrode 1 electron collection peak vertical hole movement transversal hole induced by e induced by h total current log-log plot linear scale plot

18
**Simulation of a uniform charge deposition (2)**

1 2 3 4 Uniform Vertical deposition (25,25) Bias voltage = 50V (> full depl.) Electrons equally shared between four columns same signals on the four columns log-log current plot linear-scale current plot

19
**Full charge collection time**

Same Vbias, different impact point 1 2 3 4 (25,25) (20,20) (10,10) tail independent from impact position In the worst case of a track centered the central region, 50% of the charge is collected at t ~ 300ns Outside this region, 50% of the charge is collected within 1ns. charge collected is ¼ for interaction in the middle point

20
Conclusion 3D-STC detector: Advantage: “simple” fabrication process. Disadvantage: Very long full charge collection times. => extremely interesting device to tune the technology for the production of standard 3D detectors can be used in those applications not requiring charge information in short time

21
Additional slides

22
**CCE versus bias voltage**

Vbias=2V

Similar presentations

OK

P. Fernández-Martínez – Optimized LGAD PeripheryRESMDD14, Firenze 8-10 October 20141 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de.

P. Fernández-Martínez – Optimized LGAD PeripheryRESMDD14, Firenze 8-10 October 20141 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de.

© 2019 SlidePlayer.com Inc.

All rights reserved.

To make this website work, we log user data and share it with processors. To use this website, you must agree to our Privacy Policy, including cookie policy.

Ads by Google