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17.11.04 Technion Digital Lab Project Xilinx ML310 board based on VirtexII-PRO programmable device Students: Tsimerman Igor Firdman Leonid Firdman Leonid.

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Presentation on theme: "17.11.04 Technion Digital Lab Project Xilinx ML310 board based on VirtexII-PRO programmable device Students: Tsimerman Igor Firdman Leonid Firdman Leonid."— Presentation transcript:

1 17.11.04 Technion Digital Lab Project Xilinx ML310 board based on VirtexII-PRO programmable device Students: Tsimerman Igor Firdman Leonid Firdman Leonid Supervisor: Rivkin Ina

2 17.11.04 Technion Digital Lab Project Agenda Project goals Project resources HW/SW flow charter Project schedule – first & second semester Openings

3 17.11.04 Technion Digital Lab Project Project goals Studying and investigating Xilinx ML310 board PS2 user softcore implementation Board Ramp-Up with Linux OS

4 17.11.04 Technion Digital Lab Project Project goals Studying and investigating Xilinx ML310 board –Studying and making a list of existing board’s peripherals –Making al list and activation of on board soft cores (using EDK) –Making a list of non-existing / “non-suitable” soft cores and finding a ways to activate them

5 17.11.04 Technion Digital Lab Project Project goals PS2 user softcore implementation Peripherals Xilinx ML310 PS2 Keyboard Virtex II Pro Output Device (LCD, Uart …) Power PC 405 PS2 Softcore (User Defined) OPB Out Dev Conn. PLB Output Device softcore PLB/OPB Bridge

6 17.11.04 Technion Digital Lab Project Project resources

7 17.11.04 Technion Digital Lab Project Project resources

8 17.11.04 Technion Digital Lab Project Project resources Virtex II Pro FPGA –~30K ASIC gates –136 18x18-bit Multipliers –2448 Kb of on-chip memory –2 Power PC 4.05 CPU core –8 DCM (digital clock manager) units

9 17.11.04 Technion Digital Lab Project HW/SW Flow HW Block Diagram HW Description Synthesize P&R BIT File/ Download HW Flow SW Flow Chart Create SW Source Compile Simulate ELF File/ Download SW Flow ISE Design Debug (HW and SW) DATA2BRAM EDK

10 17.11.04 Technion Digital Lab Project Project schedule first semester Studying the VHDL programming language Studying the VHDL programming language Studying Simulation and Synthesis programs (EDK, HDL Designer) Studying Simulation and Synthesis programs (EDK, HDL Designer) Get familiar with the Xilinx ML310 board and Virtex II Pro FPGA Get familiar with the Xilinx ML310 board and Virtex II Pro FPGA Keyboard (on PS2) softcore implementation and indication on LCD Keyboard (on PS2) softcore implementation and indication on LCD

11 17.11.04 Technion Digital Lab Project Project schedule second semester Xilinx ML310 board Ramp-Up with Linux OS Xilinx ML310 board Ramp-Up with Linux OS

12 17.11.04 Technion Digital Lab Project Openings LINUX / Win OS? Which peripherals have to be included in final Ramp-Up process? Second semester – mutual project with Intel?


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