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Zspice, a Verilog-AMS based spice- solver for compact device modeling development Laurent Lemaitre Motorola – Geneva – Switzerland.

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Presentation on theme: "Zspice, a Verilog-AMS based spice- solver for compact device modeling development Laurent Lemaitre Motorola – Geneva – Switzerland."— Presentation transcript:

1 Zspice, a Verilog-AMS based spice- solver for compact device modeling development Laurent Lemaitre Motorola – Geneva – Switzerland

2 Contents Goals of the presentation What is Verilog-AMS? What is a device model compiler? Performances of adms, a model compiler How works zspice, a spice-based mini-solver? Zspice in action Conclusions

3 Goal of the presentation Try to convince you that: –the use of a model compiler and the use of Verilog-AMS, a high-level description language, can make compact device modeling a lot easier –the use of zspice, a stand-alone spice-based mini-solver, can drastically help the fast prototyping of compact device implementation

4 What is Verilog-AMS? Verilog-AMS is a Hardware Description Language used as a behavioral language for analog circuit simulators Verilog-AMS gives analog designers a means to encapsulate behavioral description of analog systems into modules Verilog-AMS can be re-used for compact device modeling. L. Lemaitre, ADMS – Automatic Device Model Synthesizer, cicc2002 M. Mierzwinski, Changing the Paradigm for Compact Model Integration in Circuit Simulators Using Verilog-A, nanotech2003 K. Kundert, Automatic Model Compilation, An Idea Whose Time has Come www.designers- guide.comAutomatic Model Compilation, An Idea Whose Time has Come More info at http://www.accellera.org/ http://www.accellera.org/

5 Model Compiler I - overview ADMS Parser XML Internal data Code Generator Other applications Documentation Circuit Test benches Testing prior implementation C code Mica, Spectre, ADS, … Verilog-AMS Source Code ADMS Data Base ADMS-XML Simulator-specific Interfaces Other ADMS-XML Interfaces ADMS – Automatic Device Model Synthesizer

6 Model Compiler II – how to run it BIPOLAR TRANSISTOR in VERILOG- AMS ready-to-compile C code Run admsSpectre SPECTREinterface.h BIPdefs.h BIPinitParameter.c BIPloadJacobian.c BIPevaluateStatic.c BIPevaluateDynamic.c …

7 Model Compiler III - interfaces CAD vendors can specify the way c code will be generated: –admsXml mymodule.va –e ADSinterface.xml ready-to-compile c code for ADS –admsXml mymodule.va –e SPECTREinterface.xml ready-to-compile c code for Spectre –admsXml mymodule.va –e SPICE3interface.xml –admsXml mymodule.va –e StandAloneinterface.xml –admsXml mymodule.va –e TestBenchinterface.xml Note that core c code of a device model is the same between simulators. Integrity of the core of the model is preserved. if one bug is found in one model then a fix will apply to all models created so far.

8 zspice I - overview xml-based specification zspice interface basic dc solver basic ac solver zspice netlists verilog-ams devices voltage source simple resistor hbt device (device under test) create c-code with adms executable different flavors of outputs can be created spice-like outputs (svg format) statistics (tables) … re-use freeware, do not re-invent the wheel shared inside community compile with c compiler

9 zspice II - spice-like outputs re-use of existing freewares SVGviewer inside internet explorer

10 zspice III - statistics 1.2.0 ADMS v01.2.0 ADMS v11.2.0 Modified1.1.5 Avg vbicEval (cpu)51,61340,64635,70034,188 100%80%69%65% #calls of pow()15,840,06610,320,0436,000,0255,520,023 100%66%38%36% #calls of exp()12,240,0517,440,0316,000,0255,040,021 100%60%46%40% #calls of log()5,760,0244,320,018 4,080,017 100%76% 70% #calls of sqrt()8,640,0361,920,008 1,440,006 100%23% 16% #Tran steps240,000 #Tran Iters560,001 Tran CPU (sec)123.9123.6118.3112.2 model under test: VBIC with selft heating 1.1.5 and 1.2.0

11 Work in progress Verilog-AMS subcommittee started April 2003 mission: extend verilog-AMS to cover compect device modeling adms and zspice proposed as test vehicule for the new language adms and zspice planned to be open-source (sourceforge) adms and zspice planned to be under the umbrella of this subcommittee Interested Parties Motorola - Mica Cadence - Spectre Agilent - ads Nassda - hsim Xpedion - GoldenGate Mentor - Eldo Helsinki University of Technology - Aplac University of Washington: C. J. Richard Shi – spice3 interface

12 Conclusions adms, a model compiler based on Verilog-AMS, has been presented zspice, a stand-alone mini-solver zspice, has been presented Advantages/Results of the use of adms and zspice have been stressed


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