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Hierarchical Fault Collapsing for Logic Circuits Thesis Advisor:Vishwani D. Agrawal Committee Members:Victor P. Nelson, Charles E. Stroud Dept. of ECE,

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Presentation on theme: "Hierarchical Fault Collapsing for Logic Circuits Thesis Advisor:Vishwani D. Agrawal Committee Members:Victor P. Nelson, Charles E. Stroud Dept. of ECE,"— Presentation transcript:

1 Hierarchical Fault Collapsing for Logic Circuits Thesis Advisor:Vishwani D. Agrawal Committee Members:Victor P. Nelson, Charles E. Stroud Dept. of ECE, Auburn University Master’s Defense Raja K. K. R. Sandireddy Dept. of ECE, Auburn University

2 Feb. 9, 2005Raja Sandireddy: MS Defense2 Outline Introduction Background –Fault Equivalence and Fault Dominance –Functional collapsing –Hierarchical fault collapsing Fault Equivalence and Dominance definitions Algorithm to find dominance relations Results of functional collapsing Hierarchical fault collapsing Results of hierarchical fault collapsing Conclusions and Future work

3 Feb. 9, 2005Raja Sandireddy: MS Defense3 Introduction DUT Generate fault list Collapse fault list Generate test vectors Fault model Required fault coverage Test Vector Generation Flow

4 Feb. 9, 2005Raja Sandireddy: MS Defense4 Stuck-at Fault Single stuck-at fault model is the most popular model. a 0 a 1 b 0 b 1 c 0 c 1 Subscript fault notation: a 0 means stuck-at-0 on line a. a b c

5 Feb. 9, 2005Raja Sandireddy: MS Defense5 Equivalence Structural R-equivalence 1 : Two faults f 1 and f 2 are said to be R-equivalent if they produce the same reduced circuit graph [netlist] when faulty values are implied and constant edges [signals] are removed. Functional F-equivalence 1 : Two faults f 1 and f 2 are said to be F-equivalent if they modify the Boolean function of the circuit in the same way, i.e., they yield the same output functions. 1 E. J. McCluskey and F. W. Clegg, “Fault Equivalence in Combinational Logic Networks,” IEEE Trans. Computers, vol. C-20, no. 11, Nov. 1971, pp. 1286-1293.

6 Feb. 9, 2005Raja Sandireddy: MS Defense6 Structural Equivalence a 1 ≡ b 1 ≡ c 1 : Equivalence Equivalent faults are indistinguishable at all primary outputs of the circuit. a 0 a 1 b 0 b 1 c 0 c 1

7 Feb. 9, 2005Raja Sandireddy: MS Defense7 Structural Dominance A fault f i is said to dominate fault f j if the faults are equivalent with respect to test set of fault f j. Dominance relations a 0  c 0 b 0  c 0 a 1  c 1 a 1  c 1 b 1  c 1 b 1  c 1 a 1  b 1 a 1  b 1 Equivalence Relations }}}}}} a 1 ≡ c 1 b 1 ≡ c 1 a 1 ≡ b 1 a 0 a 1 b 0 b 1 c 0 c 1 } a 1 ≡ b 1 ≡ c 1

8 Feb. 9, 2005Raja Sandireddy: MS Defense8 Fault Collapsing Equivalence Collapsing: It is the process of selecting one fault from each equivalence fault set. Dominance Collapsing: From the equivalence collapsed set, all the dominating faults are left out retaining their respective dominated faults. For the OR gate, Equivalence collapsed set = {a 0, b 0, c 0, c 1 } Dominance collapsed set = {a 0, b 0, c 1 }

9 Feb. 9, 2005Raja Sandireddy: MS Defense9 Collapse Ratio Example: Full adder circuit. Total faults: 60 Structural equivalence collapsed set 2, 3 = 38 (0.63) Structural dominance collapsed set 3 = 30 (0.5) 2 Using Hitec: T. M. Niermann and J. H. Patel, “HITEC: A Test Generation Package for Sequential Circuits,” Proc. European Design Automation Conference, Feb. 1991, pp. 214-218. 3 Using Fastest: T. P. Kelsey, K. K. Saluja, and S. Y. Lee, “An Efficient Algorithm for Sequential Circuit Test Generation,” IEEE Trans. Computers, vol. 42, no. 11, pp. 1361-1371, Nov. 1993.

10 Feb. 9, 2005Raja Sandireddy: MS Defense10 Dominance Graph A 2-input OR gate and its dominance graph a0a0 a1a1 b0b0 b1b1 c0c0 c1c1 a0a0 100010 a1a1 010101 b0b0 001010 b1b1 010101 c0c0 000010 c1c1 010101 Dominance Matrix a b c Used for fault collapsing.

11 Feb. 9, 2005Raja Sandireddy: MS Defense11 Two Algorithms: Equivalence and Dominance 4 4 A. V. S. S. Prasad, V. D. Agrawal, and M. V. Atre, “A New Algorithm for Global Fault Collapsing into Equivalence and Dominance Sets,” Proc. International Test Conf., Oct. 2002, pp. 391-397. a0a0 a1a1 b0b0 b1b1 c0c0 c1c1 a0a0 100010 a1a1 010101 b0b0 001010 b1b1 010101 c0c0 000010 c1c1 010101 1 1 a0a0 b0b0 c0c0 c1c1 a0a0 1010 b0b0 0110 c0c0 0010 c1c1 0001 a0a0 b0b0 c1c1 a0a0 100 b0b0 010 c1c1 001 1 1 Algorithm Equivalence Algorithm Dominance 1 1 1 1

12 Feb. 9, 2005Raja Sandireddy: MS Defense12 Functional Equivalence If faults in blocks F 1 and F 2 are equivalent, then Z ≡ 0. F1F1 F2F2 Z F0F0 F2F2 F1F1 Z For the full-adder, functional equivalence collapsed set = 26 (0.43). {Structural equiv. = 38, Structural dom. = 30}

13 Feb. 9, 2005Raja Sandireddy: MS Defense13 Functional Dominance 5 F1F1 F0F0 F2F2 Z If the fault introduced in block F 1 dominates the fault in block F 2, then Z is always 0. 5 V. D. Agrawal, A. V. S. S. Prasad, and M. V. Atre, “Fault Collapsing via Functional Dominance,” Proc. International Test Conf., 2003, pp. 274-280. 1 1 0 For the full adder, functional dominance collapsed set = 12 (0.20) { Structural equiv. = 38, Structural dom. = 30, Functional equiv.= 23 }

14 Feb. 9, 2005Raja Sandireddy: MS Defense14 Hierarchical Circuits Increasing complexity of designs is efficiently handled by hierarchical design process. Hierarchical fault collapsing: Create a library –For smaller sub-circuits, exhaustive collapsing is done using the methods discussed earlier. –For larger sub-circuits, use structural collapsing. At the top level, do structural collapsing using the library information to collapse the faults at lower levels.

15 Feb. 9, 2005Raja Sandireddy: MS Defense15 Hierarchical Fault Collapsing Advantages: Fault set computed once is reused for all instances of the sub-circuit. Exhaustive collapsing of faults in smaller circuits to achieve smaller collapsed sets. Faster collapsing. Theorem 6 : If two faults are functionally equivalent in a sub-circuit C i that is embedded in a circuit C j then they are also functionally equivalent in C j. 6 R. Hahn, R. Krieger, and B. Becker, “A Hierarchical Approach to Fault Collapsing,” Proc. European Design & Test Conf., 1994, pp. 171–176. Note: Functional equivalence here means diagnostic equivalence as defined next.

16 Feb. 9, 2005Raja Sandireddy: MS Defense16 Equivalence Definitions Fault Equivalence: Two faults are equivalent if and only if the corresponding faulty circuits have identical output functions. For multiple output circuits, this is extended for two possible interpretations. Diagnostic Equivalence - Two faults of a Boolean circuit are called diagnostically equivalent if and only if the pair of the output functions is identical at each output of the circuit. Detection Equivalence - Two faults are called detection equivalent if and only if all tests that detect one fault also detect the other fault, not necessarily at the same output. For single output circuits, diagnostic and detection equivalence mean the same. Diagnostic equivalence implies detection equivalence.

17 Feb. 9, 2005Raja Sandireddy: MS Defense17 Examples to Demonstrate Detection Equivalence Y Z A B c s-a-0 The faults c 0 and Y 0 are detection equivalent faults, but not diagnostic equivalent. s-a-1 P Q R For the full adder, diagnostic equivalence collapsed set = 26 (0.43), detection equivalence collapsed set = 23 (0.38) {Structural equiv. = 38, Structural dom. = 30, Functional equiv.= 26, Functional dom.= 12} s-a-1 The faults P 1, Q 1 and R 1 are detection equivalent faults, but not diagnostic equivalent.

18 Feb. 9, 2005Raja Sandireddy: MS Defense18 Dominance Definitions Fault Dominance 7 - A fault f i is said to dominate fault f j if (a) the set of all vectors that detects fault f j is a subset of all vectors that detects fault f i and (b) each vector that detects f j implies identical values at the corresponding outputs of faulty versions of the circuit. Conventionally dominance is defined as: A fault f i is said to dominate fault f j if the faults are equivalent with respect to test set of fault f j. If all tests of fault f j detect another fault f i, then f i is said to dominate f j. 7 J. F. Poage, “Derivation of Optimum Tests to Detect Faults in Combinational Circuits", Proc. Symposium on Mathematical Theory of Automata, 1962, pp. 483-528.

19 Feb. 9, 2005Raja Sandireddy: MS Defense19 Dominance Definitions Contd. For multiple output circuits, the two possible interpretations of dominance: Diagnostic dominance - If all tests of a fault f 1 detect another fault f 2 on the exact same outputs where f 1 was detected, then f 2 is said to diagnostically dominate f 1. Detection dominance - If all tests of a fault f 1 detect another fault f 2, irrespective of the output where f 1 was detected, then f 2 is said to detection dominate f 1. Diagnostic dominance implies detection dominance. For the full adder, diagnostic dominance collapsed set = 12 (0.2) detection dominance collapsed set = 6 (0.1) {Structural equiv. = 38, Structural dom. = 30, Diagnostic equiv.= 26, Detection equiv.= 23}

20 Feb. 9, 2005Raja Sandireddy: MS Defense20 Functional Dominance F0F0 F0F0 F1F1 Faults in this circuit are checked for redundancy Fault introduced in this circuit D or D 1 0 0

21 Feb. 9, 2005Raja Sandireddy: MS Defense21 Algorithm to Find All Dominance Relations 1.Select a fault from the given circuit and build the circuit as shown in previous slide with the fault introduced in the bottom block whose function is F 1. 2.Check for redundant faults in the top block, F 0. 3.For each redundant fault found in step 2, a 1 is placed in the dominance matrix at the intersection of the row corresponding to the redundant fault and the column corresponding to the fault in the bottom block. Thus, we obtain all values of a column of the dominance matrix in a single iteration. 4.Go to step 1 until there is no fault left. 5.Now we will have the dominance matrix with all the functional dominance relations included.

22 Feb. 9, 2005Raja Sandireddy: MS Defense22 Algorithm Contd. 6.Transitive closure of the dominance matrix is computed, which is then reduced using algorithm equivalence 4. This reduced matrix still consists of dominance relations within an equivalence collapsed set of faults. 7.If dominance collapsing is required, then the reduced matrix of the previous step is further reduced according to algorithm dominance 4. For simplicity, the redundant faults of the given circuit (stand-alone F 0 ) are not considered in step 1. 4 A. V. S. S. Prasad, V. D. Agrawal, and M. V. Atre, “A New Algorithm for Global Fault Collapsing into Equivalence and Dominance Sets,” Proc. International Test Conf., Oct. 2002, pp. 391-397.

23 Feb. 9, 2005Raja Sandireddy: MS Defense23 For Multiple Output Circuits F0F0 F0F0 F1F1 Detection collapsing For a circuit with 2 outputs, the schemes used to find the dominance relations: Diagnostic collapsing F0F0 F0F0 F1F1

24 Feb. 9, 2005Raja Sandireddy: MS Defense24 Results: Functional Collapsing Circuit Name All Faults Number of Collapsed Faults (Collapse Ratio) StructuralFunctional 5 Functional Collapsing – New Results Diagnostic Criterion Detection Criterion Equiv. 2 Dom. 3 Equiv.Dom.Equiv.Dom.Equiv.Dom. XOR24 16 (0.67) 13 (0.54) 10 (0.42) 4 (0.17) 10 (0.42) 4 (0.17) 10 (0.42) 4 (0.17) Full Adder 60 38 (0.63) 30 (0.50) 26 (0.43) 14 (0.23) 26 (0.43) 12 (0.20) 23 (0.38) 6 (0.10) 8-bit Adder 466 290 (0.62) 226 (0.49) 194 (0.42) 112 (0.24) 194 (0.42) 96 (0.21) 191 (0.41) 48 (0.10) ALU (74181) 502 301 (0.60) 248 (0.49) -- 253 (0.50) 155 (0.31) 234 (0.47) 92 (0.18) 2 Using Hitec (obtained from Univ. of Illinois at Urbana-Champaign) 3 Using Fastest (obtained from Univ. of Wisconsin at Madison) 5 Agrawal, et al. ITC’03

25 Feb. 9, 2005Raja Sandireddy: MS Defense25 Results: Test Vectors Circuit No. of test vectors (no. of target faults) StructuralFunctional – New Results EquivalenceDominance Diagnostic Dominance Detection Dominance Full Adder6 (38)6 (30)7 (12)6 (6) 8-bit Adder33 (290)28 (226)32 (96)28 (48) ALU44 (293)44 (240)39 (147)38 (84) Test vectors obtained using Gentest ATPG 8. 8 W. T. Cheng and T. J. Chakraborty, “Gentest: An Automatic Test Generation System for Sequential Circuits,” Computer, vol. 22, no. 4, pp. 43–49, April 1989.

26 Feb. 9, 2005Raja Sandireddy: MS Defense26 Hierarchical Fault Collapsing Line Oriented Structural Fault Collapsing 9 : Type of gate the line feeds into Put this (these) fault (s) on the line INV, BUFNone OR, NORs-a-0 AND, NANDs-a-1 Sub-circuit, Fanouts-a-0, s-a-1 Primary Outputs-a-0, s-a-1 9 M. Nadjarbashi, Z. Navabi, and M. R. Movahedin, “Line Oriented Structural Equivalence Fault Collapsing,“ IEEE Workshop on Model and Test, 2000.

27 Feb. 9, 2005Raja Sandireddy: MS Defense27 Hierarchical Fault Collapsing Algorithm to find the dominance matrix and its transitive closure: 1.Consider a fault (f 1 ) stuck-at-b at the input of a Boolean gate. 2.If the gate is of inverting type (NOT, NOR, NAND), then invert b. 3.If the equivalent set has s-a-b on this gate output, say f 2, then return this fault – place a 1 at the intersection of the row corresponding to f 1 and column corresponding to f 2 – use Update 10 for transitive closure. End. 4.Move one gate forward towards the primary output and go to step 2. M G1 0 1 1 1 1 1 1 0 0 0 0 0 G2 G3 G4 A B C 0 10 K. K. Dave, V. D. Agrawal, and M. L. Bushnell, “Using Contrapositive Law in an Implication Graph to Identify Logic Redundancies,” Proc. 18th International Conf. VLSI Design, Jan. 2005, pp. 723-729.

28 Feb. 9, 2005Raja Sandireddy: MS Defense28 Collapsed Information File as Saved in Library a b g1 g2 g3 Circuit M $INPUTs: a 1 2 b* 3 4 $OUTPUTs: g3 12 13 $TOTAL: 14 $FAULTs: g1(0) 5 g1(1) 6 g2(1) 9 $RELATIONs: 1: 4 5 12 0 2: 6 13 0 3: 9 13 0 4: 1 5 12 0 5: 1 4 12 0 6: 2 13 0 9: 13 0 12: 1 4 5 0 13: 0 $REDUNDANT: g1(b,0) 14 M G1 G2 G3 G4 A B C FlatHierarchical Equivalence1211 Dominance88 Collapsed fault set sizes

29 Feb. 9, 2005Raja Sandireddy: MS Defense29 Results: Collapse Ratios Total Faults: Full adder: 60, 64-bit Adder: 3714, 1024-bit Adder: 59394, c432:1116, c499:2646 Detection collapsing can be used only for those sub-circuits whose outputs are POs at the top-level.

30 Feb. 9, 2005Raja Sandireddy: MS Defense30 CPU Time (s) for Different Sections of Our Program for Flattened Circuits 674.11.631.49667.4 4096-bit 26763.733.432662 8192-bit 166.40.840.74163.1 2048-bit 39.90.410.3638.3 1024-bit 9.380.200.178.60 512-bit 2.490.09 2.05 256-bit 0.750.05 0.54 128-bit 0.240.030.020.13 64-bit Total Dominance Collapsing Equivalence Collapsing Flat Structure Processing CPU time clocked on a 360MHz Sun UltraSparc 5_10 machine with 128MB memory.

31 Feb. 9, 2005Raja Sandireddy: MS Defense31 CPU Time (s) for Different Sections of Our Program for Flattened Circuits

32 Feb. 9, 2005Raja Sandireddy: MS Defense32 CPU Time (s) of Different Commands of Hitec for Fault Collapsing 12582101045 4096-bit 32650.4275.1 2048-bit 77.712.264.9 1024-bit 19.53.1516.0 512-bit 5.090.884.0 256-bit 1.470.341.03 128-bit 0.570.160.32 64-bit Total Equivalence Collapsing (equiv) Structure Processing (level)

33 Feb. 9, 2005Raja Sandireddy: MS Defense33 Comparison of CPU Times (s) Taken by Hitec and Our Program

34 Feb. 9, 2005Raja Sandireddy: MS Defense34 CPU Time (s) of Different Sections of Our Program for Hierarchical Circuits 14.33.10.379.25 4096-bit 50.26.00.7940.1 8192-bit 4.721.520.202.10 2048-bit 1.820.730.080.55 1024-bit 0.810.360.040.17 512-bit 0.390.190.020.05 256-bit 0.190.130.020.03 128-bit 0.100.070.01 64-bit TotalLibrary Equiv.+Dom. Collapsing Structure Processing

35 Feb. 9, 2005Raja Sandireddy: MS Defense35 CPU Time (s) of Our Program for Hierarchical and Flattened Circuits

36 Feb. 9, 2005Raja Sandireddy: MS Defense36 CPU Time (s) Improvement by Hierarchy Hierarchical circuitFlattened circuit 16.635.1674.11258 4096-bit 55.0127.22676-- 8192-bit 4.8010.3166.4326 2048-bit 2.313.6039.977.7 1024-bit 1.051.529.3819.5 512-bit 0.490.692.495.09 256-bit 0.240.320.751.47 128-bit 0.100.160.240.57 64-bit Multi-levelTwo-levelOur ProgramHitec

37 Feb. 9, 2005Raja Sandireddy: MS Defense37 CPU Time (s) for Hierarchical Collapsing

38 Feb. 9, 2005Raja Sandireddy: MS Defense38 Conclusions Diagnostic and detection collapsing should be used only with smaller circuits. Collapse ratios using detection dominance collapsing is about 10-20%. For larger circuits described hierarchically, use hierarchical fault collapsing. Hierarchical fault collapsing: –Better (lower) collapse ratios due to functional collapsed library –Order of magnitude reduction in collapse time. Smaller fault sets: –Fewer test vectors –Reduced fault simulation effort –Easier fault diagnosis. Use caution when using dominance collapsing!! Dom. Collapsed Set Size (Collapse Ratio) CPU s FlatHierarchicalFlatHier. 229378 (0.48)98304 (0.21)267655 8192-bit Adder

39 Feb. 9, 2005Raja Sandireddy: MS Defense39 Future Work Generate fault collapsing library of standard cells (Mentor Graphics, etc.) Incorporate VHDL or Verilog input for hierarchical netlist. Efficient redundancy detection program. Customized ATPG to obtain minimal test vector set. Extend the work for sequential circuits. Extend the work for other fault models.

40 Feb. 9, 2005Raja Sandireddy: MS Defense40 THANK YOU

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