Download presentation

Presentation is loading. Please wait.

Published bySkylar Nock Modified about 1 year ago

1

2
Fault Equivalence Number of fault sites in a Boolean gate circuit is = #PI + #gates + # (fanout branches) Fault equivalence: Two faults f1 and f2 are equivalent if all tests that detect f1 also detect f2. If faults f1 and f2 are equivalent then the corresponding faulty functions are identical. Fault collapsing: All single faults of a logic circuit can be divided into disjoint equivalence subsets, where all faults in a subset are mutually equivalent. A collapsed fault set contains one fault from each equivalence subset.

3
Fault equivalence & collapsing Combinational circuits faults f and g are equivalent iff Z f (x) = Z g (x) equivalent faults are not distinguishable For gate with controlling value c and inversion i : all input sac faults and output sa(c i) faults are equivalent

4
sa0 sa1 sa0 sa1 sa0 sa1 sa0 sa1 sa0 sa1 sa0 sa1 AND sa0 sa1 NAND OR NOR WIRE/BUFFER NOT FANOUT INVERTER Equivalence Rules

5
sa0 sa1 Faults in red removed by equivalence collapsing 20 Collapse ratio = = Equivalence Example

6
Fault Dominance If all tests of some fault F1 detect another fault F2, then F2 is said to dominate F1. Dominance fault collapsing: If fault F2 dominates F1, then F2 is removed from the fault list. Any set that detects F1 also detects F2 (that dominates F1) When dominance fault collapsing is used, it is sufficient to consider only the input faults of Boolean gates. In a tree circuit (without fanouts) PI faults form a dominance collapsed fault set.

7
Fault dominace Combinational circuits If f dominates g => any test that detects g will also detect f. Therefore, only dominating faults must be detected xyxy z Example : [x, y]=[1 0] is the only test to detect f 1 = y sa1, Since it also detects f 2 = z sa0 => f 2 dominates

8
Fault dominance & collapsing For gate with controlling value c & inversion i, the output sa(c’ i) dominates any input sac’ sequential circuits dominance fault collapsing is not useful

9
Dominance Example s-a-1 F1 s-a-1 F All tests of F2 The only test of F1 s-a-1 s-a-0 A dominance collapsed fault set (after equivalence collapsing)

10
MINIMAL SETS OF NON-DOMINATING FAULTS FOR TWO-INPUT GATES Or equivalently

11
Dominance Example sa0 sa1 Faults in red removed by equivalence collapsing 15 Collapse ratio = ── = Faults in green removed by dominance collapsing

12

13
M P L J CIRCUIT WITH FANOUT-FREE SUBCIRCUITS SHOWN

14

15

16
Equivalent to sa0 at the input Equivalent to sa1 at the input in dominance fault collapsing it is sufficient to consider only the input faults b c d e f g h M L Z J a EXAMPLE OF AN FANOUT-FREE CIRCUIT WITH SET OF DOMINANCE-REDUCED FAULTS

17

18
Checkpoint Theorem Primary inputs and fanout branches of a combinational circuit are called checkpoints. Checkpoint theorem: A test set that detects all single (multiple) stuck-at faults on all checkpoints of a combinational circuit, also detects all single (multiple) stuck-at faults in that circuit. Total fault sites = 16 Checkpoints ( ) = 10

19

20
DOMINANCE-REDUCED FAULT LIST x1x1 b c e f d h g P M L ,1

21

22
1 d f e b c g J h M P L Unused EXAMPLE OF PRUNING AND STRIPPING b f d h J M L

23
The multiple stuck-fault model Definition : Let T g be the set of all tests that detect a fault g, we say that a fault f functionally masks the fault g iff the multiple fault {f, g} is not detected by any test in T g If f masks g then {f, g} is not detected by t T g but it may be detected by other tests

24
The multiple stuck-fault model Example : Consider the faults c sa0, a sa1 t= 011 is the only test that detects fault c sa0 but t does not detect {c sa0, a sa1} => a sa1 masks c sa0 abcabc d 0/1 1 1/0 0/1 1/1 if double fault 0 if a single fault

25
The multiple stuck-fault model Example : Test set T= {1111, 0111, 1110, 1001, 1010, 0101} detects all SSF in following circuit, but the only test which detects B sa1 and C sa1 is /1 1 ABCDABCD 1/0 0/1 1/

26
The multiple stuck-fault model Example : Using Rajski’s method 11,00 00,11 01,00,11 00,11 ABCDABCD 11,00 01,00,11 00,11 11,00,10 10,00,11 11,00,01 01,00,11 B sa1 detectable if no A sa0 while C sa1 detected with no conditions

27
The multiple stuck-fault model in a irredundant two_level circuit, any complete test set for SSF detects all MSF in a fanout-free circuit, any complete test set for SSF detects all double and triple faults & there is a complete test set for SSF that detects all MSF Properties of MSF(Multiple Stuck Faults)

28
The multiple stuck-fault model in an internal fanout-free circuit, any complete test for SSF detects at least 98% of MSF with K < 6 and detects all MSF unless C contains a subcircuit with interconnection ABCDABCD 1/0 0/1 1/

Similar presentations

© 2017 SlidePlayer.com Inc.

All rights reserved.

Ads by Google