2. Proxy Cache Engine Performed by:Artyom Borzin Stas Lapchev Stas Lapchev Instructor: Hen Broodney In cooperation with Magnifier Ltd. הטכניון - מכון טכנולוגי לישראל הפקולטה להנדסת חשמל המעבדה למערכות ספרתיות מהירות Technion - Israel Institute of Technology Department of Electrical Engineering High Speed Digital Systems Laboratory

3. Background Basic Network Scheme Client Client Client Routing Server Proxy Server Request Routing 1. Local Network 2. Global Network Web Server File/Page supply Request Arrival Proxy Cache Query IF Found Then Send the file to the Client ELSE Send the request to the destination Web Server END

4. Background Basic Network Scheme Client Client Client Routing Server Proxy Server Web Server Response Routing Stores the file in local cache Response Arrival

5. Background (cont.)  Proxy Server Advantages  Request Latency Reduction  Network Traffic Reduction  Main Proxy Server Drawbacks  Latency growth with database size  Low system throughputs  High load on CPU  Poor cost/performance ratio

6. System Improvement Principle CPU Proxy Server DISK Standard Proxy Server Standard Proxy Server Implementation Implementation Request/Response

7. System Improvement Principle CPU Proxy Server Driver Driver Proxy Cache Engine DISK Suggested System Suggested System Configuration Configuration Request/Response CPU Proxy Server DISK Standard Proxy Server Standard Proxy Server Implementation Implementation Request/Response

8. Project Goals  Performance  Fast search procedures  Large database  Smart memory management  Advanced tuning capabilities  Information security  Launch-and-Forget protocol  Low CPU load  Validation environment  Function Analyzer

9. System Request Flow Host Customer Request Detailed Response SW Driver Instruction Encoding Proxy Cache Engine Response Decoding Error Request Receive & Validity Test RequestEncryption Database Maintenance Response & Status Request Limit Compression Database Access SoftwareHardware Function Analyzer

10. Block Diagram FPGA SDRAM Associative Memory Controller PCI Controller PowerSuppliers SSRAM ClockGenerator PCI Bus HOST

11. FPGA Block Diagram Local Bus Interface Request Decoder & Validity Tester Response Formatter Compression & Encryption Execution Unit Auxiliary Table DatabaseManager Database Access Controller Associative Memory ControllerSSRAM

12. Block Diagram FPGA SDRAM Associative Memory Controller PCI Controller PowerSuppliers SSRAM ClockGenerator PCI Bus HOST

13.  Function Analyzer  Request/Event Generator  Creates various request scenarios  Creates streams of requests with pseudo random length, rate and contain  Control  System dynamic tuning based on collection of statistical data  Monitoring of system parameters  Response Analyzer  Decoding of proceeded results  System response time analyses  Graphic User Interface (GUI) Environment Validation

14. Function Analyzer Panel Control Request/Event Request/Event Generator Generator ResponseAnalyzer

15. Development Steps Idea Issue Studying Algorithm Development Architecture Logic Design Simulation Production & Assembly System Integration PCB Design Software Design

16. Project Uniqueness  Unique technologies integration  Performance independence on database load  Launch-and-Forget communication protocol  Modular system architecture fits to several applications  High system performance  Good cost/performance ratio

17. Cost/Performance Analysis

19. The system is operational!