1. Performed by: Rami May, Roee Cohen Instructor: Daniel Alkalay המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory הטכניון - מכון טכנולוגי לישראל הפקולטה להנדסת חשמל Technion - Israel institute of technology department of Electrical Engineering דו ” ח סיכום פרויקט Implementation of generic interface To electronic components via USB2 Connection סמסטר ( חורף ) שנה 2008 1

2. Abstract המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 2 The project motivation was to prove system design capabilities using a low cost (99$) FPGA evaluation board and PC control. demonstration of this PC/FPGA system where : control and sampling of an external analog/digital HW and image processing on the FPGA the system implementations should demonstrate the concept of flexible partition of applications between HW and SW.

3. System description המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 3 This project implements a system which combines SW & HW elements The system shows the ability to mange the HW devices from the PC and to perform operations like data generation or sampling, image processing and controlling The project consist the following elements –On the PC: GUI C++ main code application Matlab functions USB drivers –HW : Cypress micro-controller Xilinx FPGA Spartan 3E Board peripherals ( LED’s Segments, push buttons) External devices ( A/D, D/A, PCB )

4. Specification המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory Hardware : Interfacing the Cypress micro controller Ability to active the board peripherals and GPIOs Ability to send and receive streams from external devices. Ability for image processing Software: demonstrate simple GUI to user Interfacing the USB driver which installed on PC Ability to show pictures Ability to send commands to the FPGA Ability to send streams to FPGA 4

5. System Block Diagram המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory Scop 5 USB 2 PCB card FPGA 100 MHz Function generator Analog signal USB2 wires VHD L Scop D/A

6. FPGA Block Diagram המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 6 TX Data TX Control RX data RX Control CYPRESS full empty SLOE SLRD FD[15:0] SLWR PKTEND

7. SW Block Diagram המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory GUI Control Engine MATLAB IF Received array Transfer array FILE* MATLAB USB DRIVER USB IF [512] JPEG Format